2 * Copyright (C) 2015 Timesys Corporation
3 * Copyright (C) 2015 General Electric Company
4 * Copyright (C) 2014 Advantech
5 * Copyright (C) 2012 Freescale Semiconductor, Inc.
7 * Configuration settings for the GE MX6Q Bx50v3 boards.
9 * SPDX-License-Identifier: GPL-2.0+
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
15 #include <asm/arch/imx-regs.h>
16 #include <asm/imx-common/gpio.h>
18 #if defined(CONFIG_TARGET_GE_B450V3)
19 #define CONFIG_BOARD_NAME "General Electric B450v3"
20 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b450v3.dtb"
21 #elif defined(CONFIG_TARGET_GE_B650V3)
22 #define CONFIG_BOARD_NAME "General Electric B650v3"
23 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b650v3.dtb"
24 #elif defined(CONFIG_TARGET_GE_B850V3)
25 #define CONFIG_BOARD_NAME "General Electric B850v3"
26 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b850v3.dtb"
28 #define CONFIG_BOARD_NAME "General Electric BA16 Generic"
29 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-ba16.dtb"
32 #define CONFIG_MXC_UART_BASE UART3_BASE
33 #define CONFIG_CONSOLE_DEV "ttymxc2"
35 #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
37 #define CONFIG_SUPPORT_EMMC_BOOT
39 #define CONFIG_BOOTDELAY 1
41 #include "mx6_common.h"
42 #include <linux/sizes.h>
44 #define CONFIG_DISPLAY_CPUINFO
45 #define CONFIG_DISPLAY_BOARDINFO
47 #define CONFIG_CMDLINE_TAG
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_REVISION_TAG
51 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
53 #define CONFIG_BOARD_EARLY_INIT_F
54 #define CONFIG_BOARD_LATE_INIT
56 #define CONFIG_MXC_GPIO
57 #define CONFIG_MXC_UART
59 #define CONFIG_CMD_FUSE
60 #define CONFIG_MXC_OCOTP
63 #define CONFIG_CMD_SATA
64 #define CONFIG_DWC_AHSATA
65 #define CONFIG_SYS_SATA_MAX_DEVICE 1
66 #define CONFIG_DWC_AHSATA_PORT_ID 0
67 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
72 #define CONFIG_FSL_ESDHC
73 #define CONFIG_FSL_USDHC
74 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
76 #define CONFIG_GENERIC_MMC
77 #define CONFIG_BOUNCE_BUFFER
78 #define CONFIG_DOS_PARTITION
81 #define CONFIG_USB_EHCI
82 #define CONFIG_USB_EHCI_MX6
83 #define CONFIG_USB_STORAGE
84 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
85 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
86 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
87 #define CONFIG_MXC_USB_FLAGS 0
88 #define CONFIG_USB_KEYBOARD
89 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
92 #define CONFIG_USBD_HS
93 #define CONFIG_USB_GADGET_DUALSPEED
94 #define CONFIG_USB_GADGET
95 #define CONFIG_USB_GADGET_DOWNLOAD
96 #define CONFIG_USB_GADGET_MASS_STORAGE
97 #define CONFIG_USB_FUNCTION_MASS_STORAGE
98 #define CONFIG_USB_GADGET_VBUS_DRAW 2
99 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
100 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
101 #define CONFIG_G_DNL_MANUFACTURER "Advantech"
103 /* Networking Configs */
104 #define CONFIG_FEC_MXC
106 #define IMX_FEC_BASE ENET_BASE_ADDR
107 #define CONFIG_FEC_XCV_TYPE RGMII
108 #define CONFIG_ETHPRIME "FEC"
109 #define CONFIG_FEC_MXC_PHYADDR 4
110 #define CONFIG_PHYLIB
111 #define CONFIG_PHY_ATHEROS
115 #define CONFIG_MXC_SPI
116 #define CONFIG_SF_DEFAULT_BUS 0
117 #define CONFIG_SF_DEFAULT_CS 0
118 #define CONFIG_SF_DEFAULT_SPEED 20000000
119 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
122 /* allow to overwrite serial and ethaddr */
123 #define CONFIG_ENV_OVERWRITE
124 #define CONFIG_CONS_INDEX 1
125 #define CONFIG_BAUDRATE 115200
127 /* Command definition */
128 #define CONFIG_CMD_BMODE
130 #define CONFIG_LOADADDR 0x12000000
131 #define CONFIG_SYS_TEXT_BASE 0x17800000
133 #define CONFIG_EXTRA_ENV_SETTINGS \
134 "script=boot.scr\0" \
135 "image=/boot/uImage\0" \
136 "uboot=u-boot.imx\0" \
137 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
138 "fdt_addr=0x18000000\0" \
141 "console=" CONFIG_CONSOLE_DEV "\0" \
142 "fdt_high=0xffffffff\0" \
143 "initrd_high=0xffffffff\0" \
147 "update_sd_firmware=" \
148 "if test ${ip_dyn} = yes; then " \
149 "setenv get_cmd dhcp; " \
151 "setenv get_cmd tftp; " \
153 "if mmc dev ${mmcdev}; then " \
154 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
155 "setexpr fw_sz ${filesize} / 0x200; " \
156 "setexpr fw_sz ${fw_sz} + 1; " \
157 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
161 "if tftp $loadaddr $uboot; then " \
163 "sf erase 0 0xC0000; " \
164 "sf write $loadaddr 0x400 $filesize; " \
165 "echo 'U-Boot upgraded. Please reset'; " \
167 "setargs=setenv bootargs console=${console},${baudrate} " \
168 "root=/dev/${rootdev} rw rootwait cma=128M\0" \
170 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
171 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
174 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
175 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
177 "if run loadbootscript; then " \
180 "if run loadimage; then " \
184 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
186 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
187 "if run loadfdt; then " \
188 "bootm ${loadaddr} - ${fdt_addr}; " \
190 "if test ${boot_fdt} = try; then " \
193 "echo WARN: Cannot load the DT; " \
199 "netargs=setenv bootargs console=${console},${baudrate} " \
201 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
202 "netboot=echo Booting from net ...; " \
204 "if test ${ip_dyn} = yes; then " \
205 "setenv get_cmd dhcp; " \
207 "setenv get_cmd tftp; " \
209 "${get_cmd} ${image}; " \
210 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
211 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
212 "bootm ${loadaddr} - ${fdt_addr}; " \
214 "if test ${boot_fdt} = try; then " \
217 "echo WARN: Cannot load the DT; " \
224 #define CONFIG_BOOTCOMMAND \
227 "setenv devnum 0; " \
228 "setenv rootdev sda1; " \
232 "setenv rootdev mmcblk0p1; " \
234 "setenv devnum ${sddev}; " \
235 "if mmc dev ${devnum}; then " \
237 "setenv rootdev mmcblk1p1; " \
240 "setenv devnum ${emmcdev}; " \
241 "if mmc dev ${devnum}; then " \
247 #define CONFIG_ARP_TIMEOUT 200UL
249 /* Miscellaneous configurable options */
250 #define CONFIG_SYS_LONGHELP
251 #define CONFIG_AUTO_COMPLETE
253 /* Print Buffer Size */
254 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
255 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
257 #define CONFIG_SYS_MEMTEST_START 0x10000000
258 #define CONFIG_SYS_MEMTEST_END 0x10010000
259 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
261 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
263 #define CONFIG_CMDLINE_EDITING
264 #define CONFIG_STACKSIZE (128 * 1024)
266 /* Physical Memory Map */
267 #define CONFIG_NR_DRAM_BANKS 1
268 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
270 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
271 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
272 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
274 #define CONFIG_SYS_INIT_SP_OFFSET \
275 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
276 #define CONFIG_SYS_INIT_SP_ADDR \
277 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
279 /* FLASH and environment organization */
280 #define CONFIG_SYS_NO_FLASH
282 #define CONFIG_ENV_IS_IN_SPI_FLASH
283 #define CONFIG_ENV_SIZE (8 * 1024)
284 #define CONFIG_ENV_OFFSET (768 * 1024)
285 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
286 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
287 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
288 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
289 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
291 #ifndef CONFIG_SYS_DCACHE_OFF
294 #define CONFIG_SYS_FSL_USDHC_NUM 3
298 #define CONFIG_VIDEO_IPUV3
299 #define CONFIG_CFB_CONSOLE
300 #define CONFIG_VGA_AS_SINGLE_DEVICE
301 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
302 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
303 #define CONFIG_VIDEO_BMP_RLE8
304 #define CONFIG_SPLASH_SCREEN
305 #define CONFIG_SPLASH_SCREEN_ALIGN
306 #define CONFIG_BMP_16BPP
307 #define CONFIG_VIDEO_LOGO
308 #define CONFIG_VIDEO_BMP_LOGO
309 #define CONFIG_IPUV3_CLK 260000000
310 #define CONFIG_IMX_HDMI
311 #define CONFIG_IMX_VIDEO_SKIP
313 #define CONFIG_PWM_IMX
314 #define CONFIG_IMX6_PWM_PER_CLK 66000000
316 #undef CONFIG_CMD_PCI
317 #ifdef CONFIG_CMD_PCI
319 #define CONFIG_PCI_PNP
320 #define CONFIG_PCI_SCAN_SHOW
321 #define CONFIG_PCIE_IMX
322 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
323 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
327 #define CONFIG_SYS_I2C
328 #define CONFIG_SYS_I2C_MXC
329 #define CONFIG_SYS_I2C_SPEED 100000
330 #define CONFIG_SYS_I2C_MXC_I2C1
331 #define CONFIG_SYS_I2C_MXC_I2C2
332 #define CONFIG_SYS_I2C_MXC_I2C3
334 #endif /* __GE_BX50V3_CONFIG_H */