1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2012 Atmel Corporation
4 * Copyright (C) 2019 Stefan Roese <sr@denx.de>
6 * Configuation settings for the GARDENA smart Gateway (AT91SAM9G25)
13 #include <linux/bitops.h>
16 /* ARM asynchronous clock */
17 #define CFG_SYS_AT91_SLOW_CLOCK 32768
18 #define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
21 #define CFG_SYS_SDRAM_BASE 0x20000000
22 #define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
25 #define CFG_SYS_NAND_BASE 0x40000000
27 #define CFG_SYS_NAND_MASK_ALE BIT(21)
29 #define CFG_SYS_NAND_MASK_CLE BIT(22)
30 #define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
31 #define CFG_SYS_NAND_READY_PIN AT91_PIN_PD5
35 #define CFG_SYS_MASTER_CLOCK 132096000
36 #define CFG_SYS_AT91_PLLA 0x20c73f03
37 #define CFG_SYS_MCKR 0x1301
38 #define CFG_SYS_MCKR_CSS 0x1302
40 #define CFG_SYS_NAND_U_BOOT_SIZE 0xa0000
41 #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
42 #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE