2 * Configuration settings for the Espresso7420 board.
3 * Copyright (C) 2016 Samsung Electronics
4 * Thomas Abraham <thomas.ab@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __CONFIG_EXYNOS7420_COMMON_H
10 #define __CONFIG_EXYNOS7420_COMMON_H
12 /* High Level Configuration Options */
13 #define CONFIG_SAMSUNG /* in a SAMSUNG core */
14 #define CONFIG_EXYNOS7420 /* Exynos7 Family */
17 #include <asm/arch/cpu.h> /* get chip and board defs */
18 #include <linux/sizes.h>
20 #define CONFIG_ARCH_CPU_INIT
22 /* Size of malloc() pool before and after relocation */
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
25 /* Miscellaneous configurable options */
26 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
27 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
28 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
30 /* Boot Argument Buffer Size */
31 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
33 /* select serial console configuration */
35 /* Timer input clock frequency */
36 #define COUNTER_FREQUENCY 24000000
39 #define CONFIG_DEVICE_TREE_LIST "exynos7420-espresso7420"
42 #define CONFIG_IRAM_BASE 0x02100000
43 #define CONFIG_IRAM_SIZE 0x58000
44 #define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE)
45 #define CPU_RELEASE_ADDR secondary_boot_addr
47 /* Number of CPUs available */
48 #define CONFIG_CORE_COUNT 0x8
50 /* select serial console configuration */
52 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
54 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
55 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
56 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
57 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
58 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
59 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
60 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
61 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
62 #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
63 #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
64 #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
65 #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
66 #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
67 #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
68 #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
69 #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
71 /* Configuration of ENV Blocks */
72 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
74 #define BOOT_TARGET_DEVICES(func) \
78 #ifndef MEM_LAYOUT_ENV_SETTINGS
79 #define MEM_LAYOUT_ENV_SETTINGS \
80 "bootm_size=0x10000000\0" \
81 "kernel_addr_r=0x42000000\0" \
82 "fdt_addr_r=0x43000000\0" \
83 "ramdisk_addr_r=0x43300000\0" \
84 "scriptaddr=0x50000000\0" \
85 "pxefile_addr_r=0x51000000\0"
88 #ifndef EXYNOS_DEVICE_SETTINGS
89 #define EXYNOS_DEVICE_SETTINGS \
95 #ifndef EXYNOS_FDTFILE_SETTING
96 #define EXYNOS_FDTFILE_SETTING
99 #define CONFIG_EXTRA_ENV_SETTINGS \
100 EXYNOS_DEVICE_SETTINGS \
101 EXYNOS_FDTFILE_SETTING \
102 MEM_LAYOUT_ENV_SETTINGS
104 #endif /* __CONFIG_EXYNOS7420_COMMON_H */