1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the Espresso7420 board.
4 * Copyright (C) 2016 Samsung Electronics
5 * Thomas Abraham <thomas.ab@samsung.com>
8 #ifndef __CONFIG_EXYNOS7420_COMMON_H
9 #define __CONFIG_EXYNOS7420_COMMON_H
11 /* High Level Configuration Options */
12 #define CONFIG_SAMSUNG /* in a SAMSUNG core */
15 #include <asm/arch/cpu.h> /* get chip and board defs */
16 #include <linux/sizes.h>
18 /* Miscellaneous configurable options */
19 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
20 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
22 /* Boot Argument Buffer Size */
23 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
25 /* select serial console configuration */
28 #define CONFIG_IRAM_BASE 0x02100000
29 #define CONFIG_IRAM_SIZE 0x58000
30 #define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE)
31 #define CPU_RELEASE_ADDR secondary_boot_addr
33 /* select serial console configuration */
35 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
36 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
37 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
38 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
39 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
40 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
41 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
42 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
43 #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
44 #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
45 #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
46 #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
47 #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
48 #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
49 #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
50 #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
52 /* Configuration of ENV Blocks */
54 #define BOOT_TARGET_DEVICES(func) \
58 #ifndef MEM_LAYOUT_ENV_SETTINGS
59 #define MEM_LAYOUT_ENV_SETTINGS \
60 "bootm_size=0x10000000\0" \
61 "kernel_addr_r=0x42000000\0" \
62 "fdt_addr_r=0x43000000\0" \
63 "ramdisk_addr_r=0x43300000\0" \
64 "scriptaddr=0x50000000\0" \
65 "pxefile_addr_r=0x51000000\0"
68 #ifndef EXYNOS_DEVICE_SETTINGS
69 #define EXYNOS_DEVICE_SETTINGS \
75 #ifndef EXYNOS_FDTFILE_SETTING
76 #define EXYNOS_FDTFILE_SETTING
79 #define CONFIG_EXTRA_ENV_SETTINGS \
80 EXYNOS_DEVICE_SETTINGS \
81 EXYNOS_FDTFILE_SETTING \
82 MEM_LAYOUT_ENV_SETTINGS
84 #endif /* __CONFIG_EXYNOS7420_COMMON_H */