1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * egnite GmbH <info@egnite.de>
6 * Configuation settings for Ethernut 5 with AT91SAM9XE.
12 #include <asm/hardware.h>
14 /* The first stage boot loader expects u-boot running at this address. */
16 /* The first stage boot loader takes care of low level initialization. */
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
22 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
24 /* 32kB internal SRAM */
25 #define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 /*AT91SAM9XE_SRAM_BASE */
26 #define CONFIG_SYS_INIT_RAM_SIZE (32 << 10)
28 /* 128MB SDRAM in 1 bank */
29 #define CONFIG_SYS_SDRAM_BASE 0x20000000
30 #define CONFIG_SYS_SDRAM_SIZE (128 << 20)
32 /* 512kB on-chip NOR flash */
33 # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */
34 # define CONFIG_SYS_MAX_FLASH_SECT 32
35 # define CONFIG_EFLASH_PROTSECTORS 1
38 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
41 #ifdef CONFIG_CMD_NAND
42 #define CONFIG_SYS_MAX_NAND_DEVICE 1
43 #define CONFIG_SYS_NAND_BASE 0x40000000
44 #define CONFIG_SYS_NAND_DBW_8
46 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
48 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
49 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
55 #define CONFIG_PHY_ID 0
56 #define CONFIG_MACB_SEARCH_PHY
60 #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
65 #define CONFIG_USB_ATMEL
66 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
67 #define CONFIG_USB_OHCI_NEW
68 #define CONFIG_SYS_USB_OHCI_CPU_INIT
69 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
70 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "host"
71 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
75 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
76 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
80 #define CONFIG_SYS_MAX_I2C_BUS 1
82 #define I2C_SOFT_DECLARATIONS
84 #define GPIO_I2C_SCL AT91_PIO_PORTA, 24
85 #define GPIO_I2C_SDA AT91_PIO_PORTA, 23
88 at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
89 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
90 at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
91 at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
92 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
95 #define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
96 #define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
97 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
98 #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
99 #define I2C_DELAY udelay(100)
100 #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23)
102 /* DHCP/BOOTP options */
103 #ifdef CONFIG_CMD_DHCP
104 #define CONFIG_SYS_AUTOLOAD "n"
111 /* Misc. u-boot settings */