1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * egnite GmbH <info@egnite.de>
6 * Configuation settings for Ethernut 5 with AT91SAM9XE.
12 #include <asm/hardware.h>
14 /* The first stage boot loader expects u-boot running at this address. */
16 /* The first stage boot loader takes care of low level initialization. */
17 #define CONFIG_SKIP_LOWLEVEL_INIT
19 /* Set our official architecture number. */
20 #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
23 #define CONFIG_ARCH_CPU_INIT
25 /* ARM asynchronous clock */
26 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
27 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
29 /* 32kB internal SRAM */
30 #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
31 #define CONFIG_SRAM_SIZE (32 << 10)
32 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
33 GENERATED_GBL_DATA_SIZE)
35 /* 128MB SDRAM in 1 bank */
36 #define CONFIG_NR_DRAM_BANKS 1
37 #define CONFIG_SYS_SDRAM_BASE 0x20000000
38 #define CONFIG_SYS_SDRAM_SIZE (128 << 20)
39 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
40 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
41 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
42 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
43 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE \
44 - CONFIG_SYS_MALLOC_LEN)
46 /* 512kB on-chip NOR flash */
47 # define CONFIG_SYS_MAX_FLASH_BANKS 1
48 # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */
49 # define CONFIG_AT91_EFLASH
50 # define CONFIG_SYS_MAX_FLASH_SECT 32
51 # define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */
52 # define CONFIG_EFLASH_PROTSECTORS 1
55 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
56 #define CONFIG_ENV_OFFSET 0x3DE000
57 #define CONFIG_ENV_SIZE (132 << 10)
58 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
59 #define CONFIG_ENV_SPI_MAX_HZ 15000000
62 #ifdef CONFIG_CMD_NAND
63 #define CONFIG_SYS_MAX_NAND_DEVICE 1
64 #define CONFIG_SYS_NAND_BASE 0x40000000
65 #define CONFIG_SYS_NAND_DBW_8
66 #define CONFIG_NAND_ATMEL
68 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
70 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
71 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
75 #ifdef CONFIG_CMD_JFFS2
76 #define CONFIG_JFFS2_CMDLINE
77 #define CONFIG_JFFS2_NAND
81 #define CONFIG_NET_RETRY_COUNT 20
84 #define CONFIG_PHY_ID 0
85 #define CONFIG_MACB_SEARCH_PHY
89 #define CONFIG_GENERIC_ATMEL_MCI
90 #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
95 #define CONFIG_USB_ATMEL
96 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
97 #define CONFIG_USB_OHCI_NEW
98 #define CONFIG_SYS_USB_OHCI_CPU_INIT
99 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
100 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "host"
101 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
105 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
106 #define CONFIG_RTC_PCF8563
107 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
111 #define CONFIG_SYS_MAX_I2C_BUS 1
113 #define CONFIG_SYS_I2C
114 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
115 #define CONFIG_SYS_I2C_SOFT_SPEED 100000
116 #define CONFIG_SYS_I2C_SOFT_SLAVE 0
118 #define I2C_SOFT_DECLARATIONS
120 #define GPIO_I2C_SCL AT91_PIO_PORTA, 24
121 #define GPIO_I2C_SDA AT91_PIO_PORTA, 23
124 at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
125 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
126 at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
127 at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
128 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
131 #define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
132 #define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
133 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
134 #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
135 #define I2C_DELAY udelay(100)
136 #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23)
138 /* DHCP/BOOTP options */
139 #ifdef CONFIG_CMD_DHCP
140 #define CONFIG_BOOTP_BOOTFILESIZE
141 #define CONFIG_SYS_AUTOLOAD "n"
145 #define CONFIG_MTD_DEVICE
146 #define CONFIG_MTD_PARTITIONS
149 #define CONFIG_CMDLINE_TAG
150 #define CONFIG_SETUP_MEMORY_TAGS
151 #define CONFIG_INITRD_TAG
152 #define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
153 "sf read 0x22000000 0xc6000 0x294000; " \
156 /* Misc. u-boot settings */