2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #define CONFIG_MXC_UART_BASE UART2_BASE
17 #define CONFIG_CONSOLE_DEV "ttymxc1"
18 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
20 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
22 #define CONFIG_IMX_THERMAL
24 /* Size of malloc() pool */
25 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
27 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_BOARD_LATE_INIT
30 #define CONFIG_MXC_UART
33 #define CONFIG_CMD_I2C
34 #define CONFIG_SYS_I2C
35 #define CONFIG_SYS_I2C_MXC
36 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
37 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
38 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
39 #define CONFIG_SYS_I2C_SPEED 100000
42 #define CONFIG_CMD_USB
43 #define CONFIG_USB_EHCI
44 #define CONFIG_USB_EHCI_MX6
45 #define CONFIG_USB_STORAGE
46 #define CONFIG_USB_HOST_ETHER
47 #define CONFIG_USB_ETHER_ASIX
48 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
49 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
50 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
51 #define CONFIG_MXC_USB_FLAGS 0
54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
56 #define CONFIG_FEC_MXC
58 #define IMX_FEC_BASE ENET_BASE_ADDR
59 #define CONFIG_FEC_XCV_TYPE RGMII
60 #define CONFIG_ETHPRIME "FEC"
61 #define CONFIG_FEC_MXC_PHYADDR 4
64 #define CONFIG_PHY_ATHEROS
68 #define CONFIG_SPI_FLASH_SST
69 #define CONFIG_MXC_SPI
70 #define CONFIG_SF_DEFAULT_BUS 0
71 #define CONFIG_SF_DEFAULT_CS 0
72 #define CONFIG_SF_DEFAULT_SPEED 20000000
73 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
76 #define CONFIG_CMD_BMODE
78 #define CONFIG_ARP_TIMEOUT 200UL
80 /* Print Buffer Size */
81 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
83 #define CONFIG_SYS_MEMTEST_START 0x10000000
84 #define CONFIG_SYS_MEMTEST_END 0x10010000
85 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
87 #define CONFIG_STACKSIZE (128 * 1024)
89 /* Physical Memory Map */
90 #define CONFIG_NR_DRAM_BANKS 1
91 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
93 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
94 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
95 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
97 #define CONFIG_SYS_INIT_SP_OFFSET \
98 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
99 #define CONFIG_SYS_INIT_SP_ADDR \
100 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
102 /* Environment organization */
103 #define CONFIG_ENV_SIZE (8 * 1024)
105 #if defined(CONFIG_ENV_IS_IN_MMC)
107 #define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
108 #define CONFIG_SYS_FSL_USDHC_NUM 3
109 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
110 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
111 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
112 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
114 #define CONFIG_FDTFILE "imx6q-marsboard.dtb"
115 #define CONFIG_SYS_FSL_USDHC_NUM 2
116 #define CONFIG_ENV_OFFSET (768 * 1024)
117 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
118 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
119 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
120 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
121 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
126 #define CONFIG_VIDEO_IPUV3
127 #define CONFIG_CFB_CONSOLE
128 #define CONFIG_VGA_AS_SINGLE_DEVICE
129 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
130 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
131 #define CONFIG_VIDEO_BMP_RLE8
132 #define CONFIG_SPLASH_SCREEN
133 #define CONFIG_SPLASH_SCREEN_ALIGN
134 #define CONFIG_BMP_16BPP
135 #define CONFIG_VIDEO_LOGO
136 #define CONFIG_VIDEO_BMP_LOGO
137 #define CONFIG_IPUV3_CLK 260000000
138 #define CONFIG_IMX_HDMI
139 #define CONFIG_IMX_VIDEO_SKIP
141 #include <config_distro_defaults.h>
142 #include "mx6_common.h"
144 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
145 * 1M script, 1M pxe and the ramdisk at the end */
146 #define MEM_LAYOUT_ENV_SETTINGS \
147 "bootm_size=0x10000000\0" \
148 "kernel_addr_r=0x12000000\0" \
149 "fdt_addr_r=0x13000000\0" \
150 "scriptaddr=0x13100000\0" \
151 "pxefile_addr_r=0x13200000\0" \
152 "ramdisk_addr_r=0x13300000\0"
154 #define BOOT_TARGET_DEVICES(func) \
162 #include <config_distro_bootcmd.h>
164 #define CONSOLE_STDIN_SETTINGS \
167 #define CONSOLE_STDOUT_SETTINGS \
171 #define CONSOLE_ENV_SETTINGS \
172 CONSOLE_STDIN_SETTINGS \
173 CONSOLE_STDOUT_SETTINGS
175 #define CONFIG_EXTRA_ENV_SETTINGS \
176 CONSOLE_ENV_SETTINGS \
177 MEM_LAYOUT_ENV_SETTINGS \
178 "fdtfile=" CONFIG_FDTFILE "\0" \
181 #endif /* __RIOTBOARD_CONFIG_H */