1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) Stefano Babic <sbabic@denx.de>
5 * Configuration settings for the E+L i.MX6Q DO82 board.
8 #ifndef __EL6Q_COMMON_CONFIG_H
9 #define __EL6Q_COMMON_CONFIG_H
11 #define CONFIG_BOARD_NAME EL6Q
13 #include "mx6_common.h"
15 #define CONFIG_IMX_THERMAL
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
20 #define CONFIG_MXC_UART
23 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
28 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
29 #define CONFIG_SYS_FSL_USDHC_NUM 2
32 #define CONFIG_SYS_I2C
33 #define CONFIG_SYS_I2C_MXC
34 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
35 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
36 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
37 #define CONFIG_SYS_I2C_SPEED 100000
41 #define CONFIG_POWER_I2C
42 #define CONFIG_POWER_PFUZE100
43 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
46 #define CONFIG_SF_DEFAULT_BUS 3
47 #define CONFIG_SF_DEFAULT_CS 0
48 #define CONFIG_SF_DEFAULT_SPEED 20000000
49 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
51 /* allow to overwrite serial and ethaddr */
52 #define CONFIG_ENV_OVERWRITE
53 #define CONFIG_MXC_UART_BASE UART2_BASE
55 #define CONFIG_BOARD_NAME EL6Q
57 #define CONFIG_EXTRA_ENV_SETTINGS \
58 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
59 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
60 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
61 "console=" CONSOLE_DEV "\0" \
62 "fdtfile=undefined\0" \
63 "fdt_high=0xffffffff\0" \
64 "fdt_addr_r=0x18000000\0" \
65 "fdt_addr=0x18000000\0" \
66 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
67 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
68 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
69 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
72 #define BOOT_TARGET_DEVICES(func) \
78 #include <config_distro_bootcmd.h>
80 #define CONFIG_ARP_TIMEOUT 200UL
82 #define CONFIG_SYS_MEMTEST_START 0x10000000
83 #define CONFIG_SYS_MEMTEST_END 0x10800000
84 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
86 /* Physical Memory Map */
87 #define CONFIG_NR_DRAM_BANKS 1
88 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
90 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
91 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
92 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
94 #define CONFIG_SYS_INIT_SP_OFFSET \
95 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
96 #define CONFIG_SYS_INIT_SP_ADDR \
97 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
99 /* environment organization */
101 #define CONFIG_ENV_SIZE (8 * 1024)
103 #if defined(CONFIG_ENV_IS_IN_MMC)
104 #define CONFIG_SYS_MMC_ENV_DEV 1
105 #define CONFIG_SYS_MMC_ENV_PART 2
106 #define CONFIG_ENV_OFFSET 0x0
109 #endif /* __EL6Q_COMMON_CONFIG_H */