1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
5 * Based on original Kirkwood support which is
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
11 #ifndef _CONFIG_EDMINIV2_H
12 #define _CONFIG_EDMINIV2_H
18 #define CONFIG_SPL_MAX_SIZE 0x0000fff0
19 #define CONFIG_SPL_STACK 0x00020000
20 #define CONFIG_SPL_BSS_START_ADDR 0x00020000
21 #define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff
22 #define CONFIG_SYS_SPL_MALLOC_START 0x00040000
23 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
24 #define CONFIG_SYS_UBOOT_BASE 0xfff90000
25 #define CONFIG_SYS_UBOOT_START 0x00800000
28 * High Level Configuration Options (easy to change)
31 #include <asm/arch/orion5x.h>
37 * Board-specific values for Orion5x MPP low level init:
38 * - MPPs 12 to 15 are SATA LEDs (mode 5)
39 * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
40 * MPP16 to MPP19, mode 0 for others
43 #define ORION5X_MPP0_7 0x00000003
44 #define ORION5X_MPP8_15 0x55550000
45 #define ORION5X_MPP16_23 0x00005555
48 * Board-specific values for Orion5x GPIO low level init:
49 * - GPIO3 is input (RTC interrupt)
50 * - GPIO16 is Power LED control (0 = on, 1 = off)
51 * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
52 * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
53 * - GPIO19 is SATA disk power toggle (toggles on 0-to-1)
54 * - GPIO22 is SATA disk power status ()
55 * - GPIO23 is supply status for SATA disk ()
56 * - GPIO24 is supply control for board (write 1 to power off)
57 * Last GPIO is 25, further bits are supposed to be 0.
58 * Enable mask has ones for INPUT, 0 for OUTPUT.
59 * Default is LED ON, board ON :)
62 #define ORION5X_GPIO_OUT_ENABLE 0xfef4f0ca
63 #define ORION5X_GPIO_OUT_VALUE 0x00000000
64 #define ORION5X_GPIO_IN_POLARITY 0x000000d0
67 * NS16550 Configuration
70 #define CONFIG_SYS_NS16550_SERIAL
71 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
72 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
73 #define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE
76 * Serial Port configuration
77 * The following definitions let you select what serial you want to use
78 * for your console driver.
81 #define CONFIG_SYS_BAUDRATE_TABLE \
82 { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
88 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
89 #define CONFIG_SYS_FLASH_BASE 0xfff80000
93 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
100 #define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */
101 #define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */
102 #define CONFIG_PHY_BASE_ADR 0x8
110 /* Data, registers and alternate blocks are at the same offset */
111 /* Each 8-bit ATA register is aligned to a 4-bytes address */
112 /* Controller supports 48-bits LBA addressing */
114 /* A single bus, a single device */
115 /* ATA registers base is at SATA controller base */
116 /* ATA bus 0 is orion5x port 1 on ED Mini V2 */
117 /* end of IDE defines */
121 * Common USB/EHCI configuration
123 #ifdef CONFIG_CMD_USB
124 #define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
125 #endif /* CONFIG_CMD_USB */
130 #ifdef CONFIG_CMD_I2C
131 #define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
135 * Environment variables configurations
138 /* Enable command line editing */
140 /* provide extensive help */
142 /* additions for new relocation code, must be added to all boards */
143 #define CONFIG_SYS_SDRAM_BASE 0
144 #define CONFIG_SYS_INIT_SP_ADDR \
145 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
147 #endif /* _CONFIG_EDMINIV2_H */