2 * U-Boot - Configuration file for Cirrus Logic EDB93xx boards
8 #ifdef CONFIG_MK_edb9301
10 #elif defined(CONFIG_MK_edb9302)
11 #define CONFIG_EDB9302
12 #elif defined(CONFIG_MK_edb9302a)
13 #define CONFIG_EDB9302A
14 #elif defined(CONFIG_MK_edb9307)
15 #define CONFIG_EDB9307
16 #elif defined(CONFIG_MK_edb9307a)
17 #define CONFIG_EDB9307A
18 #elif defined(CONFIG_MK_edb9312)
19 #define CONFIG_EDB9312
20 #elif defined(CONFIG_MK_edb9315)
21 #define CONFIG_EDB9315
22 #elif defined(CONFIG_MK_edb9315a)
23 #define CONFIG_EDB9315A
25 #error "no board defined"
28 /* Initial environment and monitor configuration options. */
29 #define CONFIG_CMDLINE_TAG 1
30 #define CONFIG_INITRD_TAG 1
31 #define CONFIG_SETUP_MEMORY_TAGS 1
32 #define CONFIG_BOOTFILE "edb93xx.img"
35 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9301
36 #elif defined(CONFIG_EDB9302)
38 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9302
39 #elif defined(CONFIG_EDB9302A)
41 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9302A
42 #elif defined(CONFIG_EDB9307)
44 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9307
45 #elif defined(CONFIG_EDB9307A)
47 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9307A
48 #elif defined(CONFIG_EDB9312)
50 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9312
51 #elif defined(CONFIG_EDB9315)
53 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9315
54 #elif defined(CONFIG_EDB9315A)
56 #define CONFIG_MACH_TYPE MACH_TYPE_EDB9315A
58 #error "no board defined"
61 /* High-level configuration options */
62 #define CONFIG_EP93XX 1 /* This is a Cirrus Logic 93xx SoC */
64 #define CONFIG_SYS_CLK_FREQ 14745600 /* EP93xx has a 14.7456 clock */
66 /* Monitor configuration */
68 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
70 /* Serial port hardware configuration */
71 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, \
73 #define CONFIG_SYS_SERIAL0 0x808C0000
74 #define CONFIG_SYS_SERIAL1 0x808D0000
75 /*#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
76 (void *)CONFIG_SYS_SERIAL1} */
78 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0}
83 /* Network hardware configuration */
84 #define CONFIG_DRIVER_EP93XX_MAC
85 #define CONFIG_MII_SUPPRESS_PREAMBLE
87 /* SDRAM configuration */
88 #if defined(CONFIG_EDB9301) || defined(CONFIG_EDB9302) || \
89 defined(CONFIG_EDB9307) || defined CONFIG_EDB9312 || \
90 defined(CONFIG_EDB9315)
92 * EDB9301/2 has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75
93 * 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set
94 * the SROMLL bit on the processor, resulting in this non-contiguous memory map.
96 * The EDB9307, EDB9312, and EDB9315 have 2 banks of SDRAM consisting of
97 * 2x Samsung K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of
101 #define CONFIG_EDB93XX_SDCS3
103 #elif defined(CONFIG_EDB9302A) || \
104 defined(CONFIG_EDB9307A) || defined(CONFIG_EDB9315A)
106 * EDB9302a has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75
107 * 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set
108 * the SROMLL bit on the processor, resulting in this non-contiguous memory map.
110 * The EDB9307A and EDB9315A have 2 banks of SDRAM consisting of 2x Samsung
111 * K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of 64 MB of SDRAM.
113 #define CONFIG_EDB93XX_SDCS0
116 #error "no SDCS configuration for this board"
119 #if defined(CONFIG_EDB93XX_SDCS3)
120 #define CONFIG_SYS_LOAD_ADDR 0x01000000 /* Default load address */
121 #define PHYS_SDRAM_1 0x00000000
122 #elif defined(CONFIG_EDB93XX_SDCS0)
123 #define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* Default load address */
124 #define PHYS_SDRAM_1 0xc0000000
127 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
129 #define CONFIG_SYS_INIT_SP_ADDR \
130 (CONFIG_SYS_SDRAM_BASE + 32*1024 - GENERATED_GBL_DATA_SIZE)
132 /* Must match kernel config */
133 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
135 /* Run-time memory allocatons */
136 #define CONFIG_SYS_GBL_DATA_SIZE 128
138 #define CONFIG_SYS_MALLOC_LEN (512 * 1024)
140 /* -----------------------------------------------------------------------------
141 * FLASH and environment organization
143 * The EDB9301, EDB9302(a), EDB9307a, EDB9315a have 1 bank of flash memory at
144 * 0x60000000 consisting of 1x Intel TE28F128J3C-150 128 Mbit flash on a 16-bit
145 * data bus, for a total of 16 MB of CFI-compatible flash.
147 * The EDB9307, EDB9312, and EDB9315 have 1 bank of flash memory at
148 * 0x60000000 consisting of 2x Micron MT28F128J3-12 128 Mbit flash on a 32-bit
149 * data bus, for a total of 32 MB of CFI-compatible flash.
152 * EDB9301/02(a)7a/15a EDB9307/12/15
153 * 0x60000000 - 0x0003FFFF u-boot u-boot
154 * 0x60040000 - 0x0005FFFF environment #1 environment #1
155 * 0x60060000 - 0x0007FFFF environment #2 environment #1 (continued)
156 * 0x60080000 - 0x0009FFFF unused environment #2
157 * 0x600A0000 - 0x000BFFFF unused environment #2 (continued)
158 * 0x600C0000 - 0x00FFFFFF unused unused
159 * 0x61000000 - 0x01FFFFFF not present unused
162 #define CONFIG_SYS_MAX_FLASH_BANKS 1
163 #define CONFIG_SYS_MAX_FLASH_SECT (256+8)
165 #define PHYS_FLASH_1 CONFIG_SYS_TEXT_BASE
166 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
168 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
169 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
171 #define CONFIG_USB_OHCI_NEW
172 #define CONFIG_USB_OHCI_EP93XX
173 #define CONFIG_SYS_USB_OHCI_CPU_INIT
174 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
175 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ep93xx-ohci"
176 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x80020000
178 /* Define to disable flash configuration*/
179 /* #define CONFIG_EP93XX_NO_FLASH_CFG */
181 /* Define this for indusrial rated chips */
182 /* #define CONFIG_EDB93XX_INDUSTRIAL */
184 #endif /* !defined (__CONFIG_H) */