3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the
6 * dLAN200 AV Wireless G ("dvlhost") board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #define CONFIG_IXP425 1
31 #define CONFIG_DVLHOST 1
33 #define CONFIG_DISPLAY_CPUINFO 1
34 #define CONFIG_DISPLAY_BOARDINFO 1
36 #define CONFIG_IXP_SERIAL
37 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
38 #define CONFIG_BAUDRATE 115200
39 #define CONFIG_BOOTDELAY 3
40 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
41 #define CONFIG_BOARD_EARLY_INIT_F 1
42 #define CONFIG_SYS_LDSCRIPT "board/dvlhost/u-boot.lds"
44 /***************************************************************
45 * U-boot generic defines start here.
46 ***************************************************************/
47 /* Size of malloc() pool */
48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
50 /* allow to overwrite serial and ethaddr */
51 #define CONFIG_ENV_OVERWRITE
53 /* Command line configuration. */
54 #include <config_cmd_default.h>
56 #define CONFIG_CMD_ELF
59 #define CONFIG_CMD_PCI
60 #define CONFIG_PCI_PNP
61 #define CONFIG_IXP_PCI
62 #define CONFIG_PCI_SCAN_SHOW
63 #define CONFIG_CMD_PCI_ENUM
66 #define CONFIG_BOOTCOMMAND "run boot_flash"
67 /* enable passing of ATAGs */
68 #define CONFIG_CMDLINE_TAG 1
69 #define CONFIG_SETUP_MEMORY_TAGS 1
70 #define CONFIG_INITRD_TAG 1
72 #if defined(CONFIG_CMD_KGDB)
73 # define CONFIG_KGDB_BAUDRATE 230400
74 /* which serial port to use */
75 # define CONFIG_KGDB_SER_INDEX 1
78 /* Miscellaneous configurable options */
79 #define CONFIG_SYS_LONGHELP
80 #define CONFIG_SYS_PROMPT "=> "
81 /* Console I/O Buffer Size */
82 #define CONFIG_SYS_CBSIZE 256
83 /* Print Buffer Size */
84 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
85 /* max number of command args */
86 #define CONFIG_SYS_MAXARGS 16
87 /* Boot Argument Buffer Size */
88 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
90 #define CONFIG_SYS_MEMTEST_START 0x00000000
91 #define CONFIG_SYS_MEMTEST_END 0x01D80000
93 /* timer clock - 2* OSC_IN system clock */
94 #define CONFIG_IXP425_TIMER_CLK 66666666
95 #define CONFIG_SYS_HZ 1000
97 /* default load address */
98 #define CONFIG_SYS_LOAD_ADDR 0x00010000
100 /* valid baudrates */
101 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
103 #define CONFIG_SERIAL_RTS_ACTIVE 1
108 * The stack sizes are set up in start.S using the settings below
110 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
112 /* Expansion bus settings */
113 #define CONFIG_SYS_EXP_CS0 0xbd113442
116 #define CONFIG_NR_DRAM_BANKS 1
117 #define PHYS_SDRAM_1 0x00000000
118 #define CONFIG_SYS_SDRAM_BASE 0x00000000
120 /* 32MB SDRAM: 2* 8Mx16, CL3 */
121 #define CONFIG_SYS_SDR_CONFIG 0x18
122 #define PHYS_SDRAM_1_SIZE 0x02000000
123 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800
124 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
125 #define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE
127 /* FLASH organization: one Spansion S29AL032D-04 Flash */
128 #define CONFIG_SYS_TEXT_BASE 0x50000000
129 #define CONFIG_SYS_MAX_FLASH_BANKS 1
130 /* max number of sectors on one chip */
131 #define CONFIG_SYS_MAX_FLASH_SECT 140
132 #define PHYS_FLASH_1 0x50000000
133 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
135 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
136 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
137 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
138 #define CONFIG_BOARD_SIZE_LIMIT 262144
140 /* Use common CFI driver */
141 #define CONFIG_SYS_FLASH_CFI
142 #define CONFIG_FLASH_CFI_DRIVER
143 /* no byte writes on IXP4xx */
144 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
146 /* print 'E' for empty sector on flinfo */
147 #define CONFIG_SYS_FLASH_EMPTY_INFO
151 /* include IXP4xx NPE support */
152 #define CONFIG_IXP4XX_NPE 1
154 #define CONFIG_NET_MULTI 1
155 /* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */
156 #define CONFIG_PHY_ADDR 0x18
157 /* NPE1 PHY: MII IP175 switch, port 5 is host port */
158 #define CONFIG_PHY1_ADDR 0x05
159 /* MII PHY management */
161 /* fixed-speed powerline modem without standard PHY registers on MII */
162 #define CONFIG_MII_NPE0_FIXEDLINK 1
163 #define CONFIG_MII_NPE0_SPEED 100
164 #define CONFIG_MII_NPE0_FULLDUPLEX 1
165 /* fixed-speed switch without standard PHY registers on MII */
166 #define CONFIG_MII_NPE1_FIXEDLINK 1
167 #define CONFIG_MII_NPE1_SPEED 100
168 #define CONFIG_MII_NPE1_FULLDUPLEX 1
170 /* Number of ethernet rx buffers & descriptors */
171 #define CONFIG_SYS_RX_ETH_BUFFER 16
172 #define CONFIG_RESET_PHY_R 1
173 /* ethernet switch connected to MII port */
174 #define CONFIG_MII_ETHSWITCH 1
175 #define CONFIG_HAS_ETH1 1
177 #define CONFIG_CMD_DHCP
178 #define CONFIG_CMD_NET
179 #define CONFIG_CMD_MII
180 #define CONFIG_CMD_PING
181 #undef CONFIG_CMD_NFS
184 #define CONFIG_BOOTP_BOOTFILESIZE
185 #define CONFIG_BOOTP_BOOTPATH
186 #define CONFIG_BOOTP_GATEWAY
187 #define CONFIG_BOOTP_HOSTNAME
189 /* Cache Configuration */
190 #define CONFIG_SYS_CACHELINE_SIZE 32
193 * environment organization:
194 * one flash sector, embedded in uboot area (bottom bootblock flash)
196 #define CONFIG_ENV_IS_IN_FLASH 1
197 #define CONFIG_ENV_SIZE 0x2000
198 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
199 #define CONFIG_SYS_USE_PPCENV 1
201 #define CONFIG_EXTRA_ENV_SETTINGS \
202 "npe_ucode=50040000\0" \
205 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \
206 "kerneladdr=50050000\0" \
207 "kernelfile=dvlhost/uImage\0" \
208 "rootfile=dvlhost/rootfs\0" \
209 "rootaddr=50170000\0" \
211 "updateboot_ser=mw.b 10000 ff 40000;" \
212 " loady ${loadaddr};" \
213 " run eraseboot writeboot\0" \
214 "updateboot_net=mw.b 10000 ff 40000;" \
215 " tftp ${loadaddr} dvlhost/u-boot.bin;" \
216 " run eraseboot writeboot\0" \
217 "eraseboot=protect off 50000000 50003fff;" \
218 " protect off 50006000 5003ffff;" \
219 " erase 50000000 50003fff;" \
220 " erase 50006000 5003ffff\0" \
221 "writeboot=cp.b 10000 50000000 4000;" \
222 " cp.b 16000 50006000 3a000\0" \
223 "updateucode=loady;" \
224 " era ${npe_ucode} +${filesize};" \
225 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
226 "updateroot=tftp ${loadaddr} ${rootfile};" \
227 " era ${rootaddr} +${filesize};" \
228 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
229 "updatekern=tftp ${loadaddr} ${kernelfile};" \
230 " era ${kerneladdr} +${filesize};" \
231 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
232 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
233 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
234 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
235 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
236 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
237 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
238 "boot_flash=run flashargs addtty addeth;" \
239 " bootm ${kerneladdr}\0" \
240 "boot_net=run netargs addtty addeth;" \
241 " tftpboot ${loadaddr} ${kernelfile};" \
244 /* additions for new relocation code, must be added to all boards */
245 #define CONFIG_SYS_INIT_SP_ADDR \
246 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
248 #endif /* __CONFIG_H */