1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
6 #ifndef _CONFIG_SYNOLOGY_DS414_H
7 #define _CONFIG_SYNOLOGY_DS414_H
9 /* Vendor kernel expects this MACH_TYPE */
10 #define CONFIG_MACH_TYPE 3036
13 * High Level Configuration Options (easy to change)
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
23 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
26 #ifndef CONFIG_SPL_BUILD
27 #define CONFIG_PCI_SCAN_SHOW
30 /* USB/EHCI/XHCI configuration */
31 #define CONFIG_EHCI_IS_TDI
34 * mv-common.h should be defined after CMD configs since it used them
35 * to enable certain macros
37 #include "mv-common.h"
40 * Memory layout while starting into the bin_hdr via the
43 * 0x4000.4000 - 0x4003.4000 headers space (192KiB)
44 * 0x4000.4030 bin_hdr start address
45 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
46 * 0x4007.fffc BootROM stack top
48 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
49 * L2 cache thus cannot be used.
54 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
56 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
57 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
59 #ifdef CONFIG_SPL_BUILD
60 #define CONFIG_SYS_MALLOC_SIMPLE
63 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
64 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
66 /* Default Environment */
67 #define CONFIG_BOOTCOMMAND \
69 "sf read ${loadaddr} 0xd0000 0x2d0000; " \
70 "sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \
71 "bootm ${loadaddr} ${ramdisk_addr_r}"
73 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "initrd_high=0xffffffff\0" \
75 "ramdisk_addr_r=0x8000000\0" \
76 "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \
77 "ethmtu=1500\0eth1mtu=1500\0" \
78 "update_uboot=sf probe; dhcp; " \
79 "mw.b ${loadaddr} 0x0 0xd0000; " \
80 "tftpboot ${loadaddr} u-boot-spl.kwb; " \
81 "sf update ${loadaddr} 0x0 0xd0000\0"
84 /* increase autoneg timeout, my NIC sucks */
85 #define PHY_ANEG_TIMEOUT 16000
87 #endif /* _CONFIG_SYNOLOGY_DS414_H */