3 * Texas Instruments Incorporated.
4 * Lokesh Vutla <lokeshvutla@ti.com>
6 * Configuration settings for the TI DRA7XX board.
7 * See ti_omap5_common.h for omap5 common settings.
9 * SPDX-License-Identifier: GPL-2.0+
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
16 #define CONFIG_BOARD_EARLY_INIT_F
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_IODELAY_RECALIBRATION
22 #ifndef CONFIG_QSPI_BOOT
23 /* MMC ENV related defines */
24 #define CONFIG_ENV_IS_IN_MMC
25 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
26 #define CONFIG_ENV_SIZE (128 << 10)
27 #define CONFIG_ENV_OFFSET 0xE0000
28 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
29 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
31 #define CONFIG_CMD_SAVEENV
33 #if (CONFIG_CONS_INDEX == 1)
34 #define CONSOLEDEV "ttyO0"
35 #elif (CONFIG_CONS_INDEX == 3)
36 #define CONSOLEDEV "ttyO2"
38 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
39 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
40 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
41 #define CONFIG_BAUDRATE 115200
43 #define CONFIG_SYS_OMAP_ABE_SYSCK
45 #ifndef CONFIG_SPL_BUILD
46 /* Define the default GPT table for eMMC */
47 #define PARTS_DEFAULT \
48 "uuid_disk=${uuid_gpt_disk};" \
49 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
51 #define DFU_ALT_INFO_MMC \
56 "MLO.raw raw 0x100 0x100;" \
57 "u-boot.img.raw raw 0x300 0x400;" \
58 "spl-os-args.raw raw 0x80 0x80;" \
59 "spl-os-image.raw raw 0x900 0x2000;" \
60 "spl-os-args fat 0 1;" \
61 "spl-os-image fat 0 1;" \
62 "u-boot.img fat 0 1;" \
65 #define DFU_ALT_INFO_EMMC \
66 "dfu_alt_info_emmc=" \
67 "rawemmc raw 0 3751936;" \
71 "MLO.raw raw 0x100 0x100;" \
72 "u-boot.img.raw raw 0x300 0x400;" \
73 "spl-os-args.raw raw 0x80 0x80;" \
74 "spl-os-image.raw raw 0x900 0x2000;" \
75 "spl-os-args fat 1 1;" \
76 "spl-os-image fat 1 1;" \
77 "u-boot.img fat 1 1;" \
80 #define DFU_ALT_INFO_RAM \
82 "kernel ram 0x80200000 0x4000000;" \
83 "fdt ram 0x80f80000 0x80000;" \
84 "ramdisk ram 0x81000000 0x4000000\0"
87 "dfu_bufsiz=0x10000\0" \
93 #define CONFIG_CMD_FASTBOOT
94 #define CONFIG_ANDROID_BOOT_IMAGE
95 #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
96 #define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000
97 #define CONFIG_FASTBOOT_FLASH
98 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
101 #include <configs/ti_omap5_common.h>
103 /* Enhance our eMMC support / experience. */
104 #define CONFIG_CMD_GPT
105 #define CONFIG_EFI_PARTITION
106 #define CONFIG_HSMMC2_8BIT
109 #define CONFIG_CMD_DHCP
110 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
111 #define CONFIG_BOOTP_DNS2
112 #define CONFIG_BOOTP_SEND_HOSTNAME
113 #define CONFIG_BOOTP_GATEWAY
114 #define CONFIG_BOOTP_SUBNETMASK
115 #define CONFIG_NET_RETRY_COUNT 10
116 #define CONFIG_CMD_PING
117 #define CONFIG_CMD_MII
118 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
119 #define CONFIG_MII /* Required in net/eth.c */
120 #define CONFIG_PHY_GIGE /* per-board part of CPSW */
121 #define CONFIG_PHYLIB
124 #undef CONFIG_OMAP3_SPI
125 #define CONFIG_TI_QSPI
126 #define CONFIG_SPI_FLASH
127 #define CONFIG_SPI_FLASH_SPANSION
128 #define CONFIG_CMD_SF
129 #define CONFIG_CMD_SPI
130 #define CONFIG_SPI_FLASH_BAR
131 #define CONFIG_TI_SPI_MMAP
132 #define CONFIG_SF_DEFAULT_SPEED 48000000
133 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
134 #define CONFIG_QSPI_QUAD_SUPPORT
137 * Default to using SPI for environment, etc.
138 * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
139 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
140 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
141 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
142 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
143 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
144 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
145 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
146 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
147 * 0x9E0000 - 0x2000000 : USERLAND
149 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
150 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
151 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
152 #if defined(CONFIG_QSPI_BOOT)
153 /* In SPL, use the environment and discard MMC support for space. */
154 #ifdef CONFIG_SPL_BUILD
155 #undef CONFIG_SPL_MMC_SUPPORT
156 #undef CONFIG_SPL_MAX_SIZE
157 #define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */
159 #define CONFIG_SPL_ENV_SUPPORT
160 #define CONFIG_ENV_IS_IN_SPI_FLASH
161 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
162 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
163 #define CONFIG_ENV_SIZE (64 << 10)
164 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
165 #define CONFIG_ENV_OFFSET 0x1C0000
166 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000
170 #define CONFIG_SPL_SPI_SUPPORT
171 #define CONFIG_SPL_SPI_LOAD
172 #define CONFIG_SPL_SPI_FLASH_SUPPORT
173 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
175 #define CONFIG_SUPPORT_EMMC_BOOT
178 #define CONFIG_CMD_USB
179 #define CONFIG_USB_HOST
180 #define CONFIG_USB_XHCI
181 #define CONFIG_USB_XHCI_OMAP
182 #define CONFIG_USB_STORAGE
183 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
185 #define CONFIG_OMAP_USB_PHY
186 #define CONFIG_OMAP_USB2PHY2_HOST
189 #define CONFIG_USB_DWC3_PHY_OMAP
190 #define CONFIG_USB_DWC3_OMAP
191 #define CONFIG_USB_DWC3
192 #define CONFIG_USB_DWC3_GADGET
194 #define CONFIG_USB_GADGET
195 #define CONFIG_USBDOWNLOAD_GADGET
196 #define CONFIG_USB_GADGET_VBUS_DRAW 2
197 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
198 #define CONFIG_G_DNL_VENDOR_NUM 0x0451
199 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022
200 #define CONFIG_USB_GADGET_DUALSPEED
202 /* USB Device Firmware Update support */
203 #define CONFIG_DFU_FUNCTION
204 #define CONFIG_DFU_RAM
205 #define CONFIG_CMD_DFU
207 #define CONFIG_DFU_MMC
208 #define CONFIG_DFU_RAM
211 #define CONFIG_BOARD_LATE_INIT
212 #define CONFIG_CMD_SCSI
213 #define CONFIG_LIBATA
214 #define CONFIG_SCSI_AHCI
215 #define CONFIG_SCSI_AHCI_PLAT
216 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
217 #define CONFIG_SYS_SCSI_MAX_LUN 1
218 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
219 CONFIG_SYS_SCSI_MAX_LUN)
223 /* NAND: device related configs */
224 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
225 #define CONFIG_SYS_NAND_OOBSIZE 64
226 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
227 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
228 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
229 CONFIG_SYS_NAND_PAGE_SIZE)
230 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
231 /* NAND: driver related configs */
232 #define CONFIG_NAND_OMAP_GPMC
233 #define CONFIG_NAND_OMAP_ELM
234 #define CONFIG_SYS_NAND_ONFI_DETECTION
235 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
236 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
237 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
238 10, 11, 12, 13, 14, 15, 16, 17, \
239 18, 19, 20, 21, 22, 23, 24, 25, \
240 26, 27, 28, 29, 30, 31, 32, 33, \
241 34, 35, 36, 37, 38, 39, 40, 41, \
242 42, 43, 44, 45, 46, 47, 48, 49, \
243 50, 51, 52, 53, 54, 55, 56, 57, }
244 #define CONFIG_SYS_NAND_ECCSIZE 512
245 #define CONFIG_SYS_NAND_ECCBYTES 14
246 #define MTDIDS_DEFAULT "nand0=nand.0"
247 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
249 "128k(NAND.SPL.backup1)," \
250 "128k(NAND.SPL.backup2)," \
251 "128k(NAND.SPL.backup3)," \
252 "256k(NAND.u-boot-spl-os)," \
254 "128k(NAND.u-boot-env)," \
255 "128k(NAND.u-boot-env.backup1)," \
257 "-(NAND.file-system)"
258 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
259 /* NAND: SPL related configs */
260 #ifdef CONFIG_SPL_NAND_SUPPORT
261 #define CONFIG_SPL_NAND_AM33XX_BCH
263 /* NAND: SPL falcon mode configs */
264 #ifdef CONFIG_SPL_OS_BOOT
265 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
266 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
267 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
269 #endif /* !CONFIG_NAND */
271 /* Parallel NOR Support */
272 #if defined(CONFIG_NOR)
273 /* NOR: device related configs */
274 #define CONFIG_SYS_MAX_FLASH_SECT 512
275 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
276 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
277 /* #define CONFIG_INIT_IGNORE_ERROR */
278 #undef CONFIG_SYS_NO_FLASH
279 #define CONFIG_CMD_FLASH
280 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
281 #define CONFIG_SYS_FLASH_PROTECTION
282 #define CONFIG_SYS_FLASH_CFI
283 #define CONFIG_FLASH_CFI_DRIVER
284 #define CONFIG_FLASH_CFI_MTD
285 #define CONFIG_SYS_MAX_FLASH_BANKS 1
286 #define CONFIG_SYS_FLASH_BASE (0x08000000)
287 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
288 /* Reduce SPL size by removing unlikey targets */
289 #ifdef CONFIG_NOR_BOOT
290 #define CONFIG_ENV_IS_IN_FLASH
291 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
292 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
293 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
295 "128k(NOR.SPL.backup1)," \
296 "128k(NOR.SPL.backup2)," \
297 "128k(NOR.SPL.backup3)," \
298 "256k(NOR.u-boot-spl-os)," \
300 "128k(NOR.u-boot-env)," \
301 "128k(NOR.u-boot-env.backup1)," \
304 #define CONFIG_ENV_OFFSET 0x001c0000
305 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000
307 #endif /* NOR support */
309 #endif /* __CONFIG_DRA7XX_EVM_H */