include/configs/dra7xx_evm.h

   1 /*
   2  * (C) Copyright 2013
   3  * Texas Instruments Incorporated.
   4  * Lokesh Vutla   <lokeshvutla@ti.com>
   5  *
   6  * Configuration settings for the TI DRA7XX board.
   7  * See ti_omap5_common.h for omap5 common settings.
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #ifndef __CONFIG_DRA7XX_EVM_H
  13 #define __CONFIG_DRA7XX_EVM_H
  14
  15 #include <environment/ti/dfu.h>
  16
  17 #define CONFIG_DRA7XX
  18
  19 #ifdef CONFIG_SPL_BUILD
  20 #define CONFIG_IODELAY_RECALIBRATION
  21 #endif
  22
  23 #define CONFIG_VERY_BIG_RAM
  24 #define CONFIG_NR_DRAM_BANKS            2
  25 #define CONFIG_MAX_MEM_MAPPED           0x80000000
  26
  27 #ifndef CONFIG_QSPI_BOOT
  28 /* MMC ENV related defines */
  29 #define CONFIG_ENV_IS_IN_MMC
  30 #define CONFIG_SYS_MMC_ENV_DEV          1       /* SLOT2: eMMC(1) */
  31 #define CONFIG_ENV_SIZE                 (128 << 10)
  32 #define CONFIG_ENV_OFFSET               0xE0000
  33 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
  34 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  35 #endif
  36
  37 #if (CONFIG_CONS_INDEX == 1)
  38 #define CONSOLEDEV                      "ttyO0"
  39 #elif (CONFIG_CONS_INDEX == 3)
  40 #define CONSOLEDEV                      "ttyO2"
  41 #endif
  42 #define CONFIG_SYS_NS16550_COM1         UART1_BASE      /* Base EVM has UART0 */
  43 #define CONFIG_SYS_NS16550_COM2         UART2_BASE      /* UART2 */
  44 #define CONFIG_SYS_NS16550_COM3         UART3_BASE      /* UART3 */
  45
  46 #define CONFIG_SYS_OMAP_ABE_SYSCK
  47
  48 #ifndef CONFIG_SPL_BUILD
  49 /* Define the default GPT table for eMMC */
  50 #define PARTS_DEFAULT \
  51         /* Linux partitions */ \
  52         "uuid_disk=${uuid_gpt_disk};" \
  53         "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
  54         /* Android partitions */ \
  55         "partitions_android=" \
  56         "uuid_disk=${uuid_gpt_disk};" \
  57         "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
  58         "name=bootloader,size=768K,uuid=${uuid_gpt_bootloader};" \
  59         "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
  60         "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
  61         "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
  62         "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
  63         "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
  64         "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
  65         "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
  66         "name=system,size=768M,uuid=${uuid_gpt_system};" \
  67         "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
  68         "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
  69         "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
  70         "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
  71
  72 #define DFUARGS \
  73         "dfu_bufsiz=0x10000\0" \
  74         DFU_ALT_INFO_MMC \
  75         DFU_ALT_INFO_EMMC \
  76         DFU_ALT_INFO_RAM \
  77         DFU_ALT_INFO_QSPI
  78 #else
  79 /* Discard fastboot in SPL build, to spare some space */
  80 #undef CONFIG_FASTBOOT
  81 #undef CONFIG_USB_FUNCTION_FASTBOOT
  82 #undef CONFIG_CMD_FASTBOOT
  83 #undef CONFIG_ANDROID_BOOT_IMAGE
  84 #undef CONFIG_FASTBOOT_BUF_ADDR
  85 #undef CONFIG_FASTBOOT_BUF_SIZE
  86 #undef CONFIG_FASTBOOT_FLASH
  87 #endif
  88
  89 #ifdef CONFIG_SPL_BUILD
  90 #undef CONFIG_CMD_BOOTD
  91 #ifdef CONFIG_SPL_DFU_SUPPORT
  92 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
  93 #define DFUARGS \
  94         "dfu_bufsiz=0x10000\0" \
  95         DFU_ALT_INFO_RAM
  96 #endif
  97 #endif
  98
  99 #include <configs/ti_omap5_common.h>
 100
 101 /* Enhance our eMMC support / experience. */
 102 #define CONFIG_RANDOM_UUID
 103 #define CONFIG_HSMMC2_8BIT
 104
 105 /* CPSW Ethernet */
 106 #define CONFIG_BOOTP_DNS                /* Configurable parts of CMD_DHCP */
 107 #define CONFIG_BOOTP_DNS2
 108 #define CONFIG_BOOTP_SEND_HOSTNAME
 109 #define CONFIG_BOOTP_GATEWAY
 110 #define CONFIG_BOOTP_SUBNETMASK
 111 #define CONFIG_NET_RETRY_COUNT          10
 112 #define CONFIG_DRIVER_TI_CPSW           /* Driver for IP block */
 113 #define CONFIG_MII                      /* Required in net/eth.c */
 114 #define CONFIG_PHY_GIGE                 /* per-board part of CPSW */
 115 #define CONFIG_PHYLIB
 116 #define CONFIG_PHY_TI
 117
 118 /* SPI */
 119 #undef  CONFIG_OMAP3_SPI
 120 #define CONFIG_TI_SPI_MMAP
 121 #define CONFIG_SF_DEFAULT_SPEED                76800000
 122 #define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_0
 123 #define CONFIG_QSPI_QUAD_SUPPORT
 124
 125 #ifdef CONFIG_SPL_BUILD
 126 #undef CONFIG_DM_SPI
 127 #undef CONFIG_DM_SPI_FLASH
 128 #endif
 129
 130 /*
 131  * Default to using SPI for environment, etc.
 132  * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
 133  * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
 134  * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
 135  * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
 136  * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
 137  * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
 138  * 0x9E0000 - 0x2000000 : USERLAND
 139  */
 140 #define CONFIG_SYS_SPI_KERNEL_OFFS      0x1E0000
 141 #define CONFIG_SYS_SPI_ARGS_OFFS        0x140000
 142 #define CONFIG_SYS_SPI_ARGS_SIZE        0x80000
 143 #if defined(CONFIG_QSPI_BOOT)
 144 #define CONFIG_ENV_IS_IN_SPI_FLASH
 145 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 146 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 147 #define CONFIG_ENV_SIZE                 (64 << 10)
 148 #define CONFIG_ENV_SECT_SIZE            (64 << 10) /* 64 KB sectors */
 149 #define CONFIG_ENV_OFFSET               0x1C0000
 150 #define CONFIG_ENV_OFFSET_REDUND        0x1D0000
 151 #endif
 152
 153 /* SPI SPL */
 154 #define CONFIG_TI_EDMA3
 155 #define CONFIG_SPL_SPI_LOAD
 156 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
 157
 158 #define CONFIG_SUPPORT_EMMC_BOOT
 159
 160 /* USB xHCI HOST */
 161 #define CONFIG_USB_XHCI_OMAP
 162 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 163
 164 #define CONFIG_OMAP_USB_PHY
 165 #define CONFIG_OMAP_USB2PHY2_HOST
 166
 167 /* SATA */
 168 #define CONFIG_SCSI
 169 #define CONFIG_LIBATA
 170 #define CONFIG_SCSI_AHCI
 171 #define CONFIG_SCSI_AHCI_PLAT
 172 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     1
 173 #define CONFIG_SYS_SCSI_MAX_LUN         1
 174 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 175                                                 CONFIG_SYS_SCSI_MAX_LUN)
 176
 177 /* NAND support */
 178 #ifdef CONFIG_NAND
 179 /* NAND: device related configs */
 180 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 181 #define CONFIG_SYS_NAND_OOBSIZE         64
 182 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 183 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 184 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 185                                          CONFIG_SYS_NAND_PAGE_SIZE)
 186 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 187 /* NAND: driver related configs */
 188 #define CONFIG_NAND_OMAP_GPMC
 189 #define CONFIG_NAND_OMAP_ELM
 190 #define CONFIG_SYS_NAND_ONFI_DETECTION
 191 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW
 192 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 193 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
 194                                          10, 11, 12, 13, 14, 15, 16, 17, \
 195                                          18, 19, 20, 21, 22, 23, 24, 25, \
 196                                          26, 27, 28, 29, 30, 31, 32, 33, \
 197                                          34, 35, 36, 37, 38, 39, 40, 41, \
 198                                          42, 43, 44, 45, 46, 47, 48, 49, \
 199                                          50, 51, 52, 53, 54, 55, 56, 57, }
 200 #define CONFIG_SYS_NAND_ECCSIZE         512
 201 #define CONFIG_SYS_NAND_ECCBYTES        14
 202 #define MTDIDS_DEFAULT                  "nand0=nand.0"
 203 #define MTDPARTS_DEFAULT                "mtdparts=nand.0:" \
 204                                         "128k(NAND.SPL)," \
 205                                         "128k(NAND.SPL.backup1)," \
 206                                         "128k(NAND.SPL.backup2)," \
 207                                         "128k(NAND.SPL.backup3)," \
 208                                         "256k(NAND.u-boot-spl-os)," \
 209                                         "1m(NAND.u-boot)," \
 210                                         "128k(NAND.u-boot-env)," \
 211                                         "128k(NAND.u-boot-env.backup1)," \
 212                                         "8m(NAND.kernel)," \
 213                                         "-(NAND.file-system)"
 214 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x000c0000
 215 /* NAND: SPL related configs */
 216 #ifdef CONFIG_SPL_NAND_SUPPORT
 217 #define CONFIG_SPL_NAND_AM33XX_BCH
 218 #endif
 219 /* NAND: SPL falcon mode configs */
 220 #ifdef CONFIG_SPL_OS_BOOT
 221 #define CONFIG_CMD_SPL_NAND_OFS         0x00080000 /* os-boot params*/
 222 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
 223 #define CONFIG_CMD_SPL_WRITE_SIZE       0x2000
 224 #endif
 225 #endif /* !CONFIG_NAND */
 226
 227 /* Parallel NOR Support */
 228 #if defined(CONFIG_NOR)
 229 /* NOR: device related configs */
 230 #define CONFIG_SYS_MAX_FLASH_SECT       512
 231 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 232 #define CONFIG_SYS_FLASH_SIZE           (64 * 1024 * 1024) /* 64 MB */
 233 /* #define CONFIG_INIT_IGNORE_ERROR */
 234 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 235 #define CONFIG_SYS_FLASH_PROTECTION
 236 #define CONFIG_SYS_FLASH_CFI
 237 #define CONFIG_FLASH_CFI_DRIVER
 238 #define CONFIG_FLASH_CFI_MTD
 239 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 240 #define CONFIG_SYS_FLASH_BASE           (0x08000000)
 241 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 242 /* Reduce SPL size by removing unlikey targets */
 243 #ifdef CONFIG_NOR_BOOT
 244 #define CONFIG_ENV_IS_IN_FLASH
 245 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)    /* 128 KiB */
 246 #define MTDIDS_DEFAULT                  "nor0=physmap-flash.0"
 247 #define MTDPARTS_DEFAULT                "mtdparts=physmap-flash.0:" \
 248                                         "128k(NOR.SPL)," \
 249                                         "128k(NOR.SPL.backup1)," \
 250                                         "128k(NOR.SPL.backup2)," \
 251                                         "128k(NOR.SPL.backup3)," \
 252                                         "256k(NOR.u-boot-spl-os)," \
 253                                         "1m(NOR.u-boot)," \
 254                                         "128k(NOR.u-boot-env)," \
 255                                         "128k(NOR.u-boot-env.backup1)," \
 256                                         "8m(NOR.kernel)," \
 257                                         "-(NOR.rootfs)"
 258 #define CONFIG_ENV_OFFSET               0x001c0000
 259 #define CONFIG_ENV_OFFSET_REDUND        0x001e0000
 260 #endif
 261 #endif  /* NOR support */
 262
 263 /* EEPROM */
 264 #define CONFIG_EEPROM_CHIP_ADDRESS 0x50
 265 #define CONFIG_EEPROM_BUS_ADDRESS 0
 266
 267 #endif /* __CONFIG_DRA7XX_EVM_H */