include/configs/digsy_mtc.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2005-2007
   6  * Modified for InterControl digsyMTC MPC5200 board by
   7  * Frank Bodammer, GCD Hard- & Software GmbH,
   8  *                 frank.bodammer@gcd-solutions.de
   9  *
  10  * (C) Copyright 2009 Semihalf
  11  * Optimized for digsyMTC by: Grzegorz Bernacki <gjb@semihalf.com>
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software\; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation\; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY\; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program\; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 /*
  36  * High Level Configuration Options
  37  */
  38
  39 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  40 #define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU) */
  41 #define CONFIG_DIGSY_MTC        1       /* ... on InterControl digsyMTC board */
  42
  43 /*
  44  * Valid values for CONFIG_SYS_TEXT_BASE are:
  45  * 0xFFF00000   boot high (standard configuration)
  46  * 0xFE000000   boot low
  47  * 0x00100000   boot from RAM (for testing only)
  48  */
  49 #ifndef CONFIG_SYS_TEXT_BASE
  50 #define CONFIG_SYS_TEXT_BASE    0xFFF00000      /* Standard: boot high */
  51 #endif
  52
  53 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000
  54
  55 #define CONFIG_SYS_CACHELINE_SIZE       32
  56
  57 /*
  58  * Serial console configuration
  59  */
  60 #define CONFIG_PSC_CONSOLE      4       /* console is on PSC4  */
  61 #define CONFIG_BAUDRATE         115200  /* ... at 115200  bps  */
  62 #define CONFIG_SYS_BAUDRATE_TABLE       \
  63         { 9600, 19200, 38400, 57600, 115200, 230400 }
  64
  65 /*
  66  * PCI Mapping:
  67  * 0x40000000 - 0x4fffffff - PCI Memory
  68  * 0x50000000 - 0x50ffffff - PCI IO Space
  69  */
  70 #define CONFIG_PCI              1
  71 #define CONFIG_PCI_PNP          1
  72 #define CONFIG_PCI_SCAN_SHOW    1
  73 #define CONFIG_PCI_BOOTDELAY    250
  74
  75 #define CONFIG_PCI_MEM_BUS      0x40000000
  76 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  77 #define CONFIG_PCI_MEM_SIZE     0x10000000
  78
  79 #define CONFIG_PCI_IO_BUS       0x50000000
  80 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  81 #define CONFIG_PCI_IO_SIZE      0x01000000
  82
  83 /*
  84  *  Partitions
  85  */
  86 #define CONFIG_DOS_PARTITION
  87 #define CONFIG_BZIP2
  88
  89 /*
  90  * Video
  91  */
  92 #define CONFIG_VIDEO
  93
  94 #ifdef CONFIG_VIDEO
  95 #define CONFIG_VIDEO_MB862xx
  96 #define CONFIG_VIDEO_MB862xx_ACCEL
  97 #define CONFIG_VIDEO_CORALP
  98 #define CONFIG_CFB_CONSOLE
  99 #define CONFIG_VIDEO_LOGO
 100 #define CONFIG_VIDEO_BMP_LOGO
 101 #define CONFIG_VIDEO_SW_CURSOR
 102 #define CONFIG_VGA_AS_SINGLE_DEVICE
 103 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 104 #define CONFIG_SPLASH_SCREEN
 105 #define CONFIG_VIDEO_BMP_GZIP
 106 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)       /* decompressed img */
 107
 108 /* Coral-PA clock frequency, geo and other both 133MHz */
 109 #define CONFIG_SYS_MB862xx_CCF  0x00050000
 110 /* Video SDRAM parameters */
 111 #define CONFIG_SYS_MB862xx_MMR  0x11d7fa72
 112 #endif
 113
 114 /*
 115  * Command line configuration.
 116  */
 117 #include <config_cmd_default.h>
 118
 119 #ifdef CONFIG_VIDEO
 120 #define CONFIG_CMD_BMP
 121 #endif
 122 #define CONFIG_CMD_DFL
 123 #define CONFIG_CMD_CACHE
 124 #define CONFIG_CMD_DATE
 125 #define CONFIG_CMD_DHCP
 126 #define CONFIG_CMD_DIAG
 127 #define CONFIG_CMD_EEPROM
 128 #define CONFIG_CMD_ELF
 129 #define CONFIG_CMD_EXT2
 130 #define CONFIG_CMD_FAT
 131 #define CONFIG_CMD_I2C
 132 #define CONFIG_CMD_IDE
 133 #define CONFIG_CMD_IRQ
 134 #define CONFIG_CMD_MII
 135 #define CONFIG_CMD_PCI
 136 #define CONFIG_CMD_PING
 137 #define CONFIG_CMD_REGINFO
 138 #define CONFIG_CMD_SAVES
 139 #define CONFIG_CMD_SPI
 140 #define CONFIG_CMD_USB
 141
 142 #if (CONFIG_SYS_TEXT_BASE == 0xFF000000)
 143 #define CONFIG_SYS_LOWBOOT      1
 144 #endif
 145
 146 /*
 147  * Autobooting
 148  */
 149 #define CONFIG_BOOTDELAY        1
 150
 151 #undef  CONFIG_BOOTARGS
 152
 153 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 154         "fw_image=digsyMPC.img\0"                                       \
 155         "mtcb_start=mtc led diag orange; run mtcb_1\0"                  \
 156         "mtcb_clearled=for x in user1 user2 usbpwr usbbusy; "           \
 157                 "do mtc led $x; done\0"                                 \
 158         "mtcb_1=if mtc key; then run mtcb_clearled mtcb_update; "       \
 159                 "else run mtcb_fw; fi\0"                                \
 160         "mtcb_fw=if bootm ff000000; then echo FIRMWARE OK!; "           \
 161                 "else echo BAD FIRMWARE CRC!; mtc led diag red; fi\0"   \
 162         "mtcb_update=mtc led user1 orange;"                             \
 163                 "while mtc key; do ; done; run mtcb_2;\0"               \
 164         "mtcb_2=mtc led user1 green 2; usb reset; run mtcb_usb1;\0"     \
 165         "mtcb_usb1=if fatload usb 0 400000 script.img; "                \
 166                 "then run mtcb_doscript; else run mtcb_usb2; fi\0"      \
 167         "mtcb_usb2=if fatload usb 0 400000 $fw_image; "                 \
 168                 "then run mtcb_dousb; else run mtcb_ide; fi\0"          \
 169         "mtcb_doscript=run mtcb_usbleds; mtc led user2 orange 2; "      \
 170                 "run mtcb_wait_flickr mtcb_ds_1;\0"                     \
 171         "mtcb_ds_1=if imi 400000; then mtc led usbbusy; "               \
 172                 "source 400000; else run mtcb_error; fi\0"              \
 173         "mtcb_dousb=run mtcb_usbleds mtcb_wait_flickr mtcb_du_1;\0"     \
 174         "mtcb_du_1=if imi 400000; then run mtcb_du_2; "                 \
 175                 "else run mtcb_error; fi\0"                             \
 176         "mtcb_du_2=run mtcb_clear mtcb_prog; mtc led usbbusy; "         \
 177                 "run mtcb_checkfw\0"                                    \
 178         "mtcb_checkfw=if imi ff000000; then run mtcb_success; "         \
 179                 "else run mtcb_error; fi\0"                             \
 180         "mtcb_waitkey=mtc key; until test $? -eq 0; do mtc key; done\0" \
 181         "mtcb_wait_flickr=run mtcb_waitkey mtcb_uledflckr\0"            \
 182         "mtcb_usbleds=mtc led usbpwr green; mtc led usbbusy orange 1;\0"\
 183         "mtcb_uledflckr=mtc led user1 orange 11\0"                      \
 184         "mtcb_error=mtc led user1 red\0"                                \
 185         "mtcb_clear=erase ff000000 ff0fffff\0"                          \
 186         "mtcb_prog=cp.b 400000 ff000000 ${filesize}\0"                  \
 187         "mtcb_success=mtc led user1 green\0"                            \
 188         "mtcb_ide=if fatload ide 0 400000 $fw_image;"                   \
 189                 "then run mtcb_doide; else run mtcb_error; fi\0"        \
 190         "mtcb_doide=mtc led user2 green 1;"                             \
 191                 "run mtcb_wait_flickr mtcb_di_1;\0"                     \
 192         "mtcb_di_1=if imi 400000; then run mtcb_di_2;"                  \
 193                 "else run mtcb_error; fi\0"                             \
 194         "mtcb_di_2=run mtcb_clear; run mtcb_prog mtcb_checkfw\0"        \
 195         "ramdisk_num_sector=16\0"                                       \
 196         "flash_base=ff000000\0"                                         \
 197         "flashdisk_size=e00000\0"                                       \
 198         "env_sector=fff60000\0"                                         \
 199         "flashdisk_start=ff100000\0"                                    \
 200         "load_cmd=tftp 400000 digsyMPC.img\0"                           \
 201         "clear_cmd=erase ff000000 ff0fffff\0"                           \
 202         "flash_cmd=cp.b 400000 ff000000 ${filesize}\0"                  \
 203         "update_cmd=run load_cmd; "                                     \
 204         "iminfo 400000; "                                               \
 205         "run clear_cmd flash_cmd; "                                     \
 206         "iminfo ff000000\0"                                             \
 207         "spi_driver=yes\0"                                              \
 208         "spi_watchdog=no\0"                                             \
 209         "ftps_start=yes\0"                                              \
 210         "ftps_user1=admin\0"                                            \
 211         "ftps_pass1=admin\0"                                            \
 212         "ftps_base1=/\0"                                                \
 213         "ftps_home1=/\0"                                                \
 214         "plc_sio_srv=no\0"                                              \
 215         "plc_sio_baud=57600\0"                                          \
 216         "plc_sio_parity=no\0"                                           \
 217         "plc_sio_stop=1\0"                                              \
 218         "plc_sio_com=2\0"                                               \
 219         "plc_eth_srv=yes\0"                                             \
 220         "plc_eth_port=1200\0"                                           \
 221         "plc_root=/ide/\0"                                              \
 222         "diag_level=0\0"                                                \
 223         "webvisu=no\0"                                                  \
 224         "plc_can1_routing=no\0"                                         \
 225         "plc_can1_baudrate=250\0"                                       \
 226         "plc_can2_routing=no\0"                                         \
 227         "plc_can2_baudrate=250\0"                                       \
 228         "plc_can3_routing=no\0"                                         \
 229         "plc_can3_baudrate=250\0"                                       \
 230         "plc_can4_routing=no\0"                                         \
 231         "plc_can4_baudrate=250\0"                                       \
 232         "netdev=eth0\0"                                                 \
 233         "console=ttyPSC0\0"                                             \
 234         "kernel_addr_r=400000\0"                                        \
 235         "fdt_addr_r=600000\0"                                           \
 236         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 237         "nfsroot=${serverip}:${rootpath}\0"                             \
 238         "addip=setenv bootargs ${bootargs} "                            \
 239         "ip=${ipaddr}:${serverip}:${gatewayip}:"                        \
 240         "${netmask}:${hostname}:${netdev}:off panic=1\0"                \
 241         "addcons=setenv bootargs ${bootargs} console=${console},${baudrate}\0"\
 242         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 243         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 244                 "tftp ${fdt_addr_r} ${fdt_file};"                       \
 245                 "run nfsargs addip addcons;"                            \
 246                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 247         "load=tftp 200000 ${u-boot}\0"                                  \
 248         "update=protect off FFF00000 +${filesize};"                     \
 249                 "erase FFF00000 +${filesize};"                          \
 250                 "cp.b 200000 FFF00000 ${filesize};"                     \
 251                 "protect on FFF00000 +${filesize}\0"                    \
 252         ""
 253
 254 #define CONFIG_BOOTCOMMAND      "run mtcb_start"
 255
 256 /*
 257  * SPI configuration
 258  */
 259 #define CONFIG_HARD_SPI         1
 260 #define CONFIG_MPC52XX_SPI      1
 261
 262 /*
 263  * I2C configuration
 264  */
 265 #define CONFIG_HARD_I2C         1
 266 #define CONFIG_SYS_I2C_MODULE   1
 267 #define CONFIG_SYS_I2C_SPEED    100000
 268 #define CONFIG_SYS_I2C_SLAVE    0x7F
 269
 270 /*
 271  * EEPROM configuration
 272  */
 273 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 274 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 275 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 276 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   70
 277
 278 /*
 279  * RTC configuration
 280  */
 281 #if defined(CONFIG_DIGSY_REV5)
 282 #define CONFIG_SYS_I2C_RTC_ADDR 0x56
 283 #define CONFIG_RTC_RV3029
 284 /* Enable 5k Ohm trickle charge resistor */
 285 #define CONFIG_SYS_RV3029_TCR   0x20
 286 #else
 287 #define CONFIG_RTC_DS1337
 288 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 289 #define CONFIG_SYS_DS1339_TCR_VAL       0xAB    /* diode + 4k resistor */
 290 #endif
 291
 292 /* ExBo I2C Addresses */
 293 #if defined(CONFIG_DIGSY_REV5)
 294 #define CONFIG_SYS_EXBO_EE_I2C_ADDRESS  0x54
 295 #else
 296 #define CONFIG_SYS_EXBO_EE_I2C_ADDRESS  0x56
 297 #endif
 298
 299 /*
 300  * Flash configuration
 301  */
 302 #define CONFIG_SYS_FLASH_CFI            1
 303 #define CONFIG_FLASH_CFI_DRIVER 1
 304
 305 #if defined(CONFIG_DIGSY_REV5)
 306 #define CONFIG_SYS_FLASH_BASE           0xFE000000
 307 #define CONFIG_SYS_FLASH_BASE_CS1       0xFC000000
 308 #define CONFIG_SYS_MAX_FLASH_BANKS      2
 309 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE, \
 310                                         CONFIG_SYS_FLASH_BASE_CS1}
 311 #define CONFIG_SYS_UPDATE_FLASH_SIZE
 312 #define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
 313 #else
 314 #define CONFIG_SYS_FLASH_BASE           0xFF000000
 315 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 316 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 317 #endif
 318
 319 #define CONFIG_SYS_MAX_FLASH_SECT       256
 320 #define CONFIG_FLASH_16BIT
 321 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
 322 #define CONFIG_SYS_FLASH_SIZE   0x01000000
 323 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000
 324 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
 325
 326 #define CONFIG_OF_LIBFDT  1
 327 #define CONFIG_OF_BOARD_SETUP   1
 328
 329 #define OF_CPU                  "PowerPC,5200@0"
 330 #define OF_SOC                  "soc5200@f0000000"
 331 #define OF_TBCLK                (bd->bi_busfreq / 4)
 332
 333 #define CONFIG_BOARD_EARLY_INIT_R
 334 #define CONFIG_MISC_INIT_R
 335
 336 /*
 337  * Environment settings
 338  */
 339 #define CONFIG_ENV_IS_IN_FLASH  1
 340 #if defined(CONFIG_LOWBOOT)
 341 #define CONFIG_ENV_ADDR         0xFF060000
 342 #else   /* CONFIG_LOWBOOT */
 343 #define CONFIG_ENV_ADDR         0xFFF60000
 344 #endif  /* CONFIG_LOWBOOT */
 345 #define CONFIG_ENV_SIZE         0x10000
 346 #define CONFIG_ENV_SECT_SIZE    0x20000
 347 #define CONFIG_ENV_OVERWRITE    1
 348
 349 /*
 350  * Memory map
 351  */
 352 #define CONFIG_SYS_MBAR         0xF0000000
 353 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 354 #if !defined(CONFIG_SYS_LOWBOOT)
 355 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 356 #else
 357 #define CONFIG_SYS_DEFAULT_MBAR 0xF0000000
 358 #endif
 359
 360 /*
 361  *  Use SRAM until RAM will be available
 362  */
 363 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 364 #define CONFIG_SYS_INIT_RAM_SIZE                MPC5XXX_SRAM_SIZE
 365
 366 #define CONFIG_SYS_GBL_DATA_OFFSET      \
 367         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 368 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 369
 370 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 371 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 372 #define CONFIG_SYS_RAMBOOT              1
 373 #endif
 374
 375 #define CONFIG_SYS_MONITOR_LEN  (256 << 10)
 376 #define CONFIG_SYS_MALLOC_LEN   (4096 << 10)
 377 #define CONFIG_SYS_BOOTMAPSZ    (8 << 20)
 378
 379 /*
 380  * Ethernet configuration
 381  */
 382 #define CONFIG_MPC5xxx_FEC      1
 383 #define CONFIG_MPC5xxx_FEC_MII100
 384 #if defined(CONFIG_DIGSY_REV5)
 385 #define CONFIG_PHY_ADDR         0x01
 386 #else
 387 #define CONFIG_PHY_ADDR         0x00
 388 #endif
 389 #define CONFIG_PHY_RESET_DELAY  1000
 390
 391 #define CONFIG_NETCONSOLE               /* include NetConsole support   */
 392
 393 /*
 394  * GPIO configuration
 395  * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1)
 396  *  Bit 0   (mask 0x80000000) : 0x1
 397  * SPI on Tmr2/3/4/5 pins
 398  *  Bit 2:3 (mask 0x30000000) : 0x2
 399  * ATA cs0/1 on csb_4/5
 400  *  Bit 6:7 (mask 0x03000000) : 0x2
 401  * Ethernet 100Mbit with MD
 402  *  Bits 12:15 (mask 0x000f0000): 0x5
 403  * USB - Two UARTs
 404  *  Bits 18:19 (mask 0x00003000) : 0x2
 405  * PSC3 - USB2 on PSC3
 406  *  Bits 20:23 (mask 0x00000f00) : 0x1
 407  * PSC2 - CAN1&2 on PSC2 pins
 408  *  Bits 25:27 (mask 0x00000070) : 0x1
 409  * PSC1 - AC97 functionality
 410  *  Bits 29:31 (mask 0x00000007) : 0x2
 411  */
 412 #define CONFIG_SYS_GPS_PORT_CONFIG      0xA2552112
 413
 414 /*
 415  * Miscellaneous configurable options
 416  */
 417 #define CONFIG_SYS_LONGHELP
 418 #define CONFIG_AUTO_COMPLETE    1
 419 #define CONFIG_CMDLINE_EDITING  1
 420 #define CONFIG_SYS_PROMPT       "=> "
 421 #define CONFIG_SYS_HUSH_PARSER
 422 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 423
 424 #define CONFIG_AUTOBOOT_KEYED
 425 #define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
 426 #define CONFIG_AUTOBOOT_DELAY_STR       " "
 427
 428 #define CONFIG_LOOPW            1
 429 #define CONFIG_MX_CYCLIC        1
 430 #define CONFIG_ZERO_BOOTDELAY_CHECK
 431
 432 #define CONFIG_SYS_CBSIZE               1024
 433 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 434 #define CONFIG_SYS_MAXARGS              32
 435 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 436
 437 #define CONFIG_SYS_ALT_MEMTEST
 438 #define CONFIG_SYS_MEMTEST_SCRATCH      0x00001000
 439 #define CONFIG_SYS_MEMTEST_START        0x00010000
 440 #define CONFIG_SYS_MEMTEST_END          0x019fffff
 441
 442 #define CONFIG_SYS_LOAD_ADDR            0x00100000
 443
 444 #define CONFIG_SYS_HZ                   1000
 445
 446 /*
 447  * Various low-level settings
 448  */
 449 #define CONFIG_SYS_SDRAM_CS1            1
 450 #define CONFIG_SYS_XLB_PIPELINING       1
 451
 452 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 453 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 454
 455 #if defined(CONFIG_SYS_LOWBOOT)
 456 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 457 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 458 #define CONFIG_SYS_BOOTCS_CFG           0x0002DD00
 459 #endif
 460
 461 #define CONFIG_SYS_CS4_START            0x60000000
 462 #define CONFIG_SYS_CS4_SIZE             0x1000
 463 #define CONFIG_SYS_CS4_CFG              0x0008FC00
 464
 465 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 466 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 467 #define CONFIG_SYS_CS0_CFG              0x0002DD00
 468
 469 #if defined(CONFIG_DIGSY_REV5)
 470 #define CONFIG_SYS_CS1_START            CONFIG_SYS_FLASH_BASE_CS1
 471 #define CONFIG_SYS_CS1_SIZE             CONFIG_SYS_FLASH_SIZE
 472 #define CONFIG_SYS_CS1_CFG              0x0002DD00
 473 #endif
 474
 475 #define CONFIG_SYS_CS_BURST             0x00000000
 476 #define CONFIG_SYS_CS_DEADCYCLE 0x11111111
 477
 478 #if !defined(CONFIG_SYS_LOWBOOT)
 479 #define CONFIG_SYS_RESET_ADDRESS        0xfff00100
 480 #else
 481 #define CONFIG_SYS_RESET_ADDRESS        0xff000100
 482 #endif
 483
 484 /*
 485  * USB
 486  */
 487 #define CONFIG_USB_OHCI_NEW
 488 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 489 #define CONFIG_USB_STORAGE
 490
 491 #define CONFIG_USB_CLOCK        0x00013333
 492 #define CONFIG_USB_CONFIG       0x00002000
 493
 494 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 495 #define CONFIG_SYS_USB_OHCI_REGS_BASE   MPC5XXX_USB
 496 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "mpc5200"
 497 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 498
 499 /*
 500  * IDE/ATA
 501  */
 502 #define CONFIG_IDE_RESET
 503 #define CONFIG_IDE_PREINIT
 504
 505 #define CONFIG_SYS_ATA_CS_ON_I2C2
 506 #define CONFIG_SYS_IDE_MAXBUS           1
 507 #define CONFIG_SYS_IDE_MAXDEVICE        1
 508
 509 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 510 #define CONFIG_SYS_ATA_BASE_ADDR        MPC5XXX_ATA
 511 #define CONFIG_SYS_ATA_DATA_OFFSET      (0x0060)
 512 #define CONFIG_SYS_ATA_REG_OFFSET       (CONFIG_SYS_ATA_DATA_OFFSET)
 513 #define CONFIG_SYS_ATA_ALT_OFFSET       (0x005C)
 514 #define CONFIG_SYS_ATA_STRIDE           4
 515
 516 #define CONFIG_ATAPI            1
 517 #define CONFIG_LBA48            1
 518
 519 #endif /* __CONFIG_H */