Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
[platform/kernel/u-boot.git] / include / configs / dig297.h
1 /*
2  * (C) Copyright 2011 Comelit Group SpA
3  * Luca Ceresoli <luca.ceresoli@comelit.it>
4  *
5  * Based on omap3_beagle.h:
6  * (C) Copyright 2006-2008
7  * Texas Instruments.
8  * Richard Woodruff <r-woodruff2@ti.com>
9  * Syed Mohammed Khasim <x0khasim@ti.com>
10  *
11  * Configuration settings for the Comelit DIG297 board.
12  *
13  * See file CREDITS for list of people who contributed to this
14  * project.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation; either version 2 of
19  * the License, or (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29  * MA 02111-1307 USA
30  */
31
32 #ifndef __CONFIG_H
33 #define __CONFIG_H
34
35 #include <asm/mach-types.h>
36 #ifdef MACH_TYPE_OMAP3_CPS
37 #error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
38 #else
39 #define MACH_TYPE_OMAP3_CPS 2751
40 #endif
41 #define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
42
43 /*
44  * High Level Configuration Options
45  */
46 #define CONFIG_OMAP             /* in a TI OMAP core */
47 #define CONFIG_OMAP34XX         /* which is a 34XX */
48 #define CONFIG_OMAP_GPIO
49
50 #define CONFIG_SYS_TEXT_BASE    0x80008000
51
52 #define CONFIG_SDRC     /* The chip has SDRC controller */
53
54 #include <asm/arch/cpu.h>               /* get chip and board defs */
55 #include <asm/arch/omap3.h>
56
57 /*
58  * Display CPU and Board information
59  */
60 #define CONFIG_DISPLAY_CPUINFO
61 #define CONFIG_DISPLAY_BOARDINFO
62
63 /* Clock Defines */
64 #define V_OSCK                  26000000        /* Clock output from T2 */
65 #define V_SCLK                  (V_OSCK >> 1)
66
67 #define CONFIG_MISC_INIT_R
68
69 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
70 #define CONFIG_SETUP_MEMORY_TAGS
71 #define CONFIG_INITRD_TAG
72 #define CONFIG_REVISION_TAG
73
74 /*
75  * Size of malloc() pool
76  */
77 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
78                                                 /* Sector */
79 #define CONFIG_SYS_MALLOC_LEN           (1024 << 10) /* UBI needs >= 512 kB */
80
81 /*
82  * Hardware drivers
83  */
84
85 /*
86  * NS16550 Configuration
87  */
88 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
89
90 #define CONFIG_SYS_NS16550
91 #define CONFIG_SYS_NS16550_SERIAL
92 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
93 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
94
95 /*
96  * select serial console configuration: UART3 (ttyO2)
97  */
98 #define CONFIG_CONS_INDEX               3
99 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
100 #define CONFIG_SERIAL3                  3
101
102 /* allow to overwrite serial and ethaddr */
103 #define CONFIG_ENV_OVERWRITE
104 #define CONFIG_BAUDRATE                 115200
105 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
106                                         115200}
107 #define CONFIG_GENERIC_MMC              1
108 #define CONFIG_MMC                      1
109 #define CONFIG_OMAP_HSMMC               1
110 #define CONFIG_DOS_PARTITION
111
112 /* library portions to compile in */
113 #define CONFIG_RBTREE
114 #define CONFIG_MTD_PARTITIONS
115 #define CONFIG_LZO
116
117 /* commands to include */
118 #include <config_cmd_default.h>
119
120 #define CONFIG_CMD_FAT          /* FAT support                  */
121 #define CONFIG_CMD_UBI          /* UBI Support                  */
122 #define CONFIG_CMD_UBIFS        /* UBIFS Support                */
123 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
124 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
125 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
126 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:896k(uboot),"\
127                                 "128k(uboot-env),3m(kernel),252m(ubi)"
128
129 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
130 #define CONFIG_CMD_MMC          /* MMC support                  */
131 #define CONFIG_CMD_NAND         /* NAND support                 */
132
133 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
134 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
135 #undef CONFIG_CMD_IMI           /* iminfo                       */
136 #undef CONFIG_CMD_IMLS          /* List all found images        */
137 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
138 #undef CONFIG_CMD_NFS           /* NFS support                  */
139
140 #define CONFIG_SYS_NO_FLASH
141 #define CONFIG_HARD_I2C
142 #define CONFIG_SYS_I2C_SPEED            100000
143 #define CONFIG_SYS_I2C_SLAVE            1
144 #define CONFIG_SYS_I2C_BUS              0
145 #define CONFIG_SYS_I2C_BUS_SELECT       1
146 #define CONFIG_DRIVER_OMAP34XX_I2C      1
147
148 /*
149  * TWL4030
150  */
151 #define CONFIG_TWL4030_POWER
152 #define CONFIG_TWL4030_LED
153
154 /*
155  * Board NAND Info.
156  */
157 #define CONFIG_NAND_OMAP_GPMC
158 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
159                                                         /* to access nand */
160 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
161                                                         /* to access nand at */
162                                                         /* CS0 */
163 #define GPMC_NAND_ECC_LP_x16_LAYOUT
164
165 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
166
167 #if defined(CONFIG_CMD_NET)
168 /*
169  * SMSC9220 Ethernet
170  */
171
172 #define CONFIG_SMC911X
173 #define CONFIG_SMC911X_32_BIT
174 #define CONFIG_SMC911X_BASE     0x2C000000
175
176 #endif /* (CONFIG_CMD_NET) */
177
178 /* Environment information */
179 #define CONFIG_BOOTDELAY                1
180
181 #define CONFIG_EXTRA_ENV_SETTINGS \
182         "loadaddr=0x82000000\0" \
183         "console=ttyO2,115200n8\0" \
184         "mtdids=" MTDIDS_DEFAULT "\0" \
185         "mtdparts=" MTDPARTS_DEFAULT "\0" \
186         "partition=nand0,3\0"\
187         "mmcroot=/dev/mmcblk0p2 rw\0" \
188         "mmcrootfstype=ext3 rootwait\0" \
189         "nandroot=ubi0:rootfs ro\0" \
190         "nandrootfstype=ubifs\0" \
191         "nfspath=/srv/nfs\0" \
192         "tftpfilename=uImage\0" \
193         "gatewayip=0.0.0.0\0" \
194         "mmcargs=setenv bootargs console=${console} " \
195                 "${mtdparts} " \
196                 "root=${mmcroot} " \
197                 "rootfstype=${mmcrootfstype} " \
198                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
199                         "${netmask}:${hostname}::off\0" \
200         "nandargs=setenv bootargs console=${console} " \
201                 "${mtdparts} " \
202                 "ubi.mtd=3 " \
203                 "root=${nandroot} " \
204                 "rootfstype=${nandrootfstype} " \
205                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
206                         "${netmask}:${hostname}::off\0" \
207         "netargs=setenv bootargs console=${console} " \
208                 "${mtdparts} " \
209                 "root=/dev/nfs rw " \
210                 "nfsroot=${serverip}:${nfspath} " \
211                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
212                         "${netmask}:${hostname}::off\0" \
213         "mmcboot=echo Booting from mmc ...; " \
214                 "run mmcargs; " \
215                 "bootm ${loadaddr}\0" \
216         "nandboot=echo Booting from nand ...; " \
217                 "run nandargs; " \
218                 "nand read ${loadaddr} 100000 300000; " \
219                 "bootm ${loadaddr}\0" \
220         "netboot=echo Booting from network ...; " \
221                 "run netargs; " \
222                 "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
223                 "bootm ${loadaddr}\0" \
224         "resetenv=nand erase e0000 20000\0"\
225
226 #define CONFIG_BOOTCOMMAND \
227         "run nandboot"
228
229 #define CONFIG_AUTO_COMPLETE
230 /*
231  * Miscellaneous configurable options
232  */
233 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
234 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
235 #define CONFIG_SYS_PROMPT               "DIG297# "
236 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
237 /* Print Buffer Size */
238 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
239                                         sizeof(CONFIG_SYS_PROMPT) + 16)
240 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
241 /* Boot Argument Buffer Size */
242 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
243
244 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
245                                                                 /* works on */
246 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
247                                         0x01F00000) /* 31MB */
248
249 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
250                                                         /* load address */
251
252 /*
253  * OMAP3 has 12 GP timers, they can be driven by the system clock
254  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
255  * This rate is divided by a local divisor.
256  */
257 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
258 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
259 #define CONFIG_SYS_HZ                   1000
260
261 /*-----------------------------------------------------------------------
262  * Physical Memory Map
263  */
264 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
265 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
266 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
267
268 /*-----------------------------------------------------------------------
269  * FLASH and environment organization
270  */
271
272 /* **** PISMO SUPPORT *** */
273
274 /* Configure the PISMO */
275 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
276
277 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
278
279 #define CONFIG_SYS_FLASH_BASE           boot_flash_base
280
281 /* Monitor at start of flash */
282 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
283
284 #define CONFIG_ENV_IS_IN_NAND
285 #define SMNAND_ENV_OFFSET               0x0E0000 /* environment starts here */
286
287 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
288 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
289 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
290
291 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
292 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
293 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
294 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
295                                          CONFIG_SYS_INIT_RAM_SIZE - \
296                                          GENERATED_GBL_DATA_SIZE)
297
298 #endif /* __CONFIG_H */