1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DHCOM DH-iMX6 PDK board configuration
5 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
8 #ifndef __DH_IMX6_CONFIG_H
9 #define __DH_IMX6_CONFIG_H
11 #include <asm/arch/imx-regs.h>
13 #include "mx6_common.h"
17 * 0x00_0000-0x00_ffff ... U-Boot SPL
18 * 0x01_0000-0x0f_ffff ... U-Boot
19 * 0x10_0000-0x10_ffff ... U-Boot env #1
20 * 0x11_0000-0x11_ffff ... U-Boot env #2
21 * 0x12_0000-0x1f_ffff ... UNUSED
25 #include "imx6_spl.h" /* common IMX6 SPL configuration */
26 #define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
28 /* Miscellaneous configurable options */
31 #define CONFIG_SYS_BOOTCOUNT_BE
34 #define IMX_FEC_BASE ENET_BASE_ADDR
35 #define CONFIG_FEC_XCV_TYPE RGMII
36 #define CONFIG_FEC_MXC_PHYADDR 7
39 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
40 #define CONFIG_SYS_FSL_USDHC_NUM 3
46 #define CONFIG_MXC_UART_BASE UART1_BASE
50 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
51 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
52 #define CONFIG_MXC_USB_FLAGS 0
53 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
55 /* USB Gadget (DFU, UMS) */
56 #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
57 #define DFU_DEFAULT_POLL_TIMEOUT 300
60 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
61 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
65 #ifndef CONFIG_SPL_BUILD
66 #define CONFIG_EXTRA_ENV_SETTINGS \
67 "console=ttymxc0,115200\0" \
68 "fdt_addr=0x18000000\0" \
69 "fdt_high=0xffffffff\0" \
70 "initrd_high=0xffffffff\0" \
71 "kernel_addr_r=0x10008000\0" \
72 "fdt_addr_r=0x13000000\0" \
73 "ramdisk_addr_r=0x18000000\0" \
74 "scriptaddr=0x14000000\0" \
75 "fdtfile=imx6q-dhcom-pdk2.dtb\0"\
76 "update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \
77 "load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\
78 "sf probe && sf erase 0x0 0xa0000 && " \
79 "sf write ${loadaddr} 0x400 ${filesize}\0" \
82 #define BOOT_TARGET_DEVICES(func) \
89 #include <config_distro_bootcmd.h>
92 /* Physical Memory Map */
93 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
95 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
96 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
97 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
99 #define CONFIG_SYS_INIT_SP_OFFSET \
100 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
102 #define CONFIG_SYS_INIT_SP_ADDR \
103 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
107 #endif /* __DH_IMX6_CONFIG_H */