include/configs/devkit3250.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Embest/Timll DevKit3250 board configuration file
   4  *
   5  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
   6  */
   7
   8 #ifndef __CONFIG_DEVKIT3250_H__
   9 #define __CONFIG_DEVKIT3250_H__
  10
  11 /* SoC and board defines */
  12 #include <linux/sizes.h>
  13 #include <asm/arch/cpu.h>
  14
  15 #define CONFIG_MACH_TYPE                MACH_TYPE_DEVKIT3250
  16
  17 #if !defined(CONFIG_SPL_BUILD)
  18 #define CONFIG_SKIP_LOWLEVEL_INIT
  19 #endif
  20
  21 /*
  22  * Memory configurations
  23  */
  24 #define CONFIG_SYS_MALLOC_LEN           SZ_1M
  25 #define CONFIG_SYS_SDRAM_BASE           EMC_DYCS0_BASE
  26 #define CONFIG_SYS_SDRAM_SIZE           SZ_64M
  27
  28 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + SZ_32K)
  29
  30 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + SZ_4K \
  31                                          - GENERATED_GBL_DATA_SIZE)
  32
  33 /*
  34  * DMA
  35  */
  36 #if !defined(CONFIG_SPL_BUILD)
  37 #define CONFIG_DMA_LPC32XX
  38 #endif
  39
  40 /*
  41  * I2C
  42  */
  43 #define CONFIG_SYS_I2C
  44 #define CONFIG_SYS_I2C_LPC32XX
  45 #define CONFIG_SYS_I2C_SPEED            100000
  46
  47 /*
  48  * GPIO
  49  */
  50 #define CONFIG_LPC32XX_GPIO
  51
  52 /*
  53  * Ethernet
  54  */
  55 #define CONFIG_RMII
  56 #define CONFIG_LPC32XX_ETH
  57 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  58
  59 /*
  60  * NOR Flash
  61  */
  62 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  63 #define CONFIG_SYS_MAX_FLASH_SECT       71
  64 #define CONFIG_SYS_FLASH_BASE           EMC_CS0_BASE
  65 #define CONFIG_SYS_FLASH_SIZE           SZ_4M
  66
  67 /*
  68  * NAND controller
  69  */
  70 #define CONFIG_SYS_NAND_BASE            SLC_NAND_BASE
  71 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  72 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
  73
  74 /*
  75  * NAND chip timings
  76  */
  77 #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS        14
  78 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH          66666666
  79 #define CONFIG_LPC32XX_NAND_SLC_WHOLD           200000000
  80 #define CONFIG_LPC32XX_NAND_SLC_WSETUP          50000000
  81 #define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS        14
  82 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH          66666666
  83 #define CONFIG_LPC32XX_NAND_SLC_RHOLD           200000000
  84 #define CONFIG_LPC32XX_NAND_SLC_RSETUP          50000000
  85
  86 #define CONFIG_SYS_NAND_BLOCK_SIZE              0x20000
  87 #define CONFIG_SYS_NAND_PAGE_SIZE               NAND_LARGE_BLOCK_PAGE_SIZE
  88
  89 /*
  90  * USB
  91  */
  92 #define CONFIG_USB_OHCI_LPC32XX
  93 #define CONFIG_USB_ISP1301_I2C_ADDR             0x2d
  94
  95 /*
  96  * U-Boot General Configurations
  97  */
  98 #define CONFIG_SYS_CBSIZE               1024
  99 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 100
 101 /*
 102  * Pass open firmware flat tree
 103  */
 104
 105 /*
 106  * Environment
 107  */
 108
 109 #define CONFIG_BOOTCOMMAND                      \
 110         "dhcp; "                                \
 111         "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; "         \
 112         "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; "       \
 113         "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; "     \
 114         "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "                  \
 115         "bootm ${loadaddr} - ${dtbaddr}"
 116
 117 #define CONFIG_EXTRA_ENV_SETTINGS               \
 118         "autoload=no\0"                         \
 119         "ethaddr=00:01:90:00:C0:81\0"           \
 120         "dtbaddr=0x81000000\0"                  \
 121         "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0"  \
 122         "tftpdir=vladimir/oe/devkit3250\0"      \
 123         "userargs=oops=panic\0"
 124
 125 /*
 126  * U-Boot Commands
 127  */
 128
 129 /*
 130  * Boot Linux
 131  */
 132 #define CONFIG_CMDLINE_TAG
 133 #define CONFIG_SETUP_MEMORY_TAGS
 134
 135 #define CONFIG_BOOTFILE                 "uImage"
 136 #define CONFIG_LOADADDR                 0x80008000
 137
 138 /*
 139  * SPL specific defines
 140  */
 141 /* SPL will be executed at offset 0 */
 142
 143 /* SPL will use SRAM as stack */
 144 #define CONFIG_SPL_STACK                0x0000FFF8
 145
 146 /* Use the framework and generic lib */
 147
 148 /* SPL will use serial */
 149
 150 /* SPL loads an image from NAND */
 151 #define CONFIG_SPL_NAND_RAW_ONLY
 152
 153 #define CONFIG_SPL_NAND_SOFTECC
 154
 155 #define CONFIG_SPL_MAX_SIZE             0x20000
 156 #define CONFIG_SPL_PAD_TO               CONFIG_SPL_MAX_SIZE
 157
 158 /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
 159 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 160 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x60000
 161
 162 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 163 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 164
 165 /* See common/spl/spl.c  spl_set_header_raw_uboot() */
 166 #define CONFIG_SYS_MONITOR_LEN          CONFIG_SYS_NAND_U_BOOT_SIZE
 167
 168 /*
 169  * Include SoC specific configuration
 170  */
 171 #include <asm/arch/config.h>
 172
 173 #endif  /* __CONFIG_DEVKIT3250_H__*/