1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Embest/Timll DevKit3250 board configuration file
5 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
8 #ifndef __CONFIG_DEVKIT3250_H__
9 #define __CONFIG_DEVKIT3250_H__
11 /* SoC and board defines */
12 #include <linux/sizes.h>
13 #include <asm/arch/cpu.h>
15 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250
17 #if !defined(CONFIG_SPL_BUILD)
18 #define CONFIG_SKIP_LOWLEVEL_INIT
22 * Memory configurations
24 #define CONFIG_SYS_MALLOC_LEN SZ_1M
25 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
26 #define CONFIG_SYS_SDRAM_SIZE SZ_64M
28 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
29 - GENERATED_GBL_DATA_SIZE)
34 #if !defined(CONFIG_SPL_BUILD)
35 #define CONFIG_DMA_LPC32XX
41 #define CONFIG_LPC32XX_GPIO
47 #define CONFIG_LPC32XX_ETH
48 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
53 #define CONFIG_SYS_MAX_FLASH_BANKS 1
54 #define CONFIG_SYS_MAX_FLASH_SECT 71
55 #define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE
56 #define CONFIG_SYS_FLASH_SIZE SZ_4M
61 #define CONFIG_SYS_NAND_BASE SLC_NAND_BASE
62 #define CONFIG_SYS_MAX_NAND_DEVICE 1
63 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
68 #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14
69 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666
70 #define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000
71 #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000
72 #define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14
73 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666
74 #define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000
75 #define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000
77 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
78 #define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
83 #define CONFIG_USB_OHCI_LPC32XX
84 #define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
87 * U-Boot General Configurations
89 #define CONFIG_SYS_CBSIZE 1024
90 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
93 * Pass open firmware flat tree
100 #define CONFIG_BOOTCOMMAND \
102 "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \
103 "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \
104 "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \
105 "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \
106 "bootm ${loadaddr} - ${dtbaddr}"
108 #define CONFIG_EXTRA_ENV_SETTINGS \
110 "ethaddr=00:01:90:00:C0:81\0" \
111 "dtbaddr=0x81000000\0" \
112 "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
113 "tftpdir=vladimir/oe/devkit3250\0" \
114 "userargs=oops=panic\0"
123 #define CONFIG_CMDLINE_TAG
124 #define CONFIG_SETUP_MEMORY_TAGS
126 #define CONFIG_BOOTFILE "uImage"
129 * SPL specific defines
131 /* SPL will be executed at offset 0 */
133 /* SPL will use SRAM as stack */
134 #define CONFIG_SPL_STACK 0x0000FFF8
136 /* Use the framework and generic lib */
138 /* SPL will use serial */
140 /* SPL loads an image from NAND */
141 #define CONFIG_SPL_NAND_RAW_ONLY
143 #define CONFIG_SPL_NAND_SOFTECC
145 #define CONFIG_SPL_MAX_SIZE 0x20000
146 #define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
148 /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
149 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
150 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
152 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
153 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
155 /* See common/spl/spl.c spl_set_header_raw_uboot() */
156 #define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
159 * Include SoC specific configuration
161 #include <asm/arch/config.h>
163 #endif /* __CONFIG_DEVKIT3250_H__*/