include/configs/devkit3250.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Embest/Timll DevKit3250 board configuration file
   4  *
   5  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
   6  */
   7
   8 #ifndef __CONFIG_DEVKIT3250_H__
   9 #define __CONFIG_DEVKIT3250_H__
  10
  11 /* SoC and board defines */
  12 #include <linux/sizes.h>
  13 #include <asm/arch/cpu.h>
  14
  15 #define CONFIG_MACH_TYPE                MACH_TYPE_DEVKIT3250
  16
  17 /*
  18  * Memory configurations
  19  */
  20 #define CONFIG_SYS_SDRAM_BASE           EMC_DYCS0_BASE
  21 #define CONFIG_SYS_SDRAM_SIZE           SZ_64M
  22
  23 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + SZ_4K \
  24                                          - GENERATED_GBL_DATA_SIZE)
  25
  26 /*
  27  * DMA
  28  */
  29
  30 /*
  31  * GPIO
  32  */
  33 #define CONFIG_LPC32XX_GPIO
  34
  35 /*
  36  * Ethernet
  37  */
  38 #define CONFIG_RMII
  39 #define CONFIG_LPC32XX_ETH
  40 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  41
  42 /*
  43  * NOR Flash
  44  */
  45 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  46 #define CONFIG_SYS_MAX_FLASH_SECT       71
  47 #define CONFIG_SYS_FLASH_BASE           EMC_CS0_BASE
  48 #define CONFIG_SYS_FLASH_SIZE           SZ_4M
  49
  50 /*
  51  * NAND controller
  52  */
  53 #define CONFIG_SYS_NAND_BASE            SLC_NAND_BASE
  54 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  55 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
  56
  57 /*
  58  * NAND chip timings
  59  */
  60 #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS        14
  61 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH          66666666
  62 #define CONFIG_LPC32XX_NAND_SLC_WHOLD           200000000
  63 #define CONFIG_LPC32XX_NAND_SLC_WSETUP          50000000
  64 #define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS        14
  65 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH          66666666
  66 #define CONFIG_LPC32XX_NAND_SLC_RHOLD           200000000
  67 #define CONFIG_LPC32XX_NAND_SLC_RSETUP          50000000
  68
  69 #define CONFIG_SYS_NAND_BLOCK_SIZE              0x20000
  70 #define CONFIG_SYS_NAND_PAGE_SIZE               NAND_LARGE_BLOCK_PAGE_SIZE
  71
  72 /*
  73  * USB
  74  */
  75 #define CONFIG_USB_OHCI_LPC32XX
  76 #define CONFIG_USB_ISP1301_I2C_ADDR             0x2d
  77
  78 /*
  79  * U-Boot General Configurations
  80  */
  81 #define CONFIG_SYS_CBSIZE               1024
  82 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  83
  84 /*
  85  * Pass open firmware flat tree
  86  */
  87
  88 /*
  89  * Environment
  90  */
  91
  92 #define CONFIG_BOOTCOMMAND                      \
  93         "dhcp; "                                \
  94         "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; "         \
  95         "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; "       \
  96         "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; "     \
  97         "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "                  \
  98         "bootm ${loadaddr} - ${dtbaddr}"
  99
 100 #define CONFIG_EXTRA_ENV_SETTINGS               \
 101         "autoload=no\0"                         \
 102         "ethaddr=00:01:90:00:C0:81\0"           \
 103         "dtbaddr=0x81000000\0"                  \
 104         "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0"  \
 105         "tftpdir=vladimir/oe/devkit3250\0"      \
 106         "userargs=oops=panic\0"
 107
 108 /*
 109  * U-Boot Commands
 110  */
 111
 112 /*
 113  * Boot Linux
 114  */
 115 #define CONFIG_CMDLINE_TAG
 116 #define CONFIG_SETUP_MEMORY_TAGS
 117
 118 #define CONFIG_BOOTFILE                 "uImage"
 119
 120 /*
 121  * SPL specific defines
 122  */
 123 /* SPL will be executed at offset 0 */
 124
 125 /* SPL will use SRAM as stack */
 126 #define CONFIG_SPL_STACK                0x0000FFF8
 127
 128 /* Use the framework and generic lib */
 129
 130 /* SPL will use serial */
 131
 132 /* SPL loads an image from NAND */
 133 #define CONFIG_SPL_NAND_RAW_ONLY
 134
 135 #define CONFIG_SPL_NAND_SOFTECC
 136
 137 #define CONFIG_SPL_MAX_SIZE             0x20000
 138 #define CONFIG_SPL_PAD_TO               CONFIG_SPL_MAX_SIZE
 139
 140 /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
 141 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 142 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x60000
 143
 144 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 145 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 146
 147 /* See common/spl/spl.c  spl_set_header_raw_uboot() */
 148 #define CONFIG_SYS_MONITOR_LEN          CONFIG_SYS_NAND_U_BOOT_SIZE
 149
 150 /*
 151  * Include SoC specific configuration
 152  */
 153 #include <asm/arch/config.h>
 154
 155 #endif  /* __CONFIG_DEVKIT3250_H__*/