2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _CONFIG_DB_88F6820_GP_H
8 #define _CONFIG_DB_88F6820_GP_H
11 * High Level Configuration Options (easy to change)
13 #define CONFIG_ARMADA_XP /* SOC Family Name */
14 #define CONFIG_ARMADA_38X
15 #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */
17 #define CONFIG_SYS_L2_PL310
19 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
20 #define CONFIG_SYS_GENERIC_BOARD
21 #define CONFIG_DISPLAY_BOARDINFO_LATE
23 #define CONFIG_SYS_TEXT_BASE 0x04000000
24 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
27 * Commands configuration
29 #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
30 #define CONFIG_CMD_CACHE
31 #define CONFIG_CMD_DHCP
32 #define CONFIG_CMD_ENV
33 #define CONFIG_CMD_EXT2
34 #define CONFIG_CMD_EXT4
35 #define CONFIG_CMD_FAT
36 #define CONFIG_CMD_FS_GENERIC
37 #define CONFIG_CMD_I2C
38 #define CONFIG_CMD_MMC
39 #define CONFIG_CMD_PING
40 #define CONFIG_CMD_SCSI
42 #define CONFIG_CMD_SPI
43 #define CONFIG_CMD_TFTPPUT
44 #define CONFIG_CMD_TIME
45 #define CONFIG_CMD_USB
48 #define CONFIG_SYS_I2C
49 #define CONFIG_SYS_I2C_MVTWSI
50 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
51 #define CONFIG_SYS_I2C_SLAVE 0x0
52 #define CONFIG_SYS_I2C_SPEED 100000
54 /* SPI NOR flash default params, used by sf commands */
55 #define CONFIG_SF_DEFAULT_SPEED 1000000
56 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
57 #define CONFIG_SPI_FLASH_STMICRO
60 * SDIO/MMC Card Configuration
63 #define CONFIG_MMC_SDMA
64 #define CONFIG_GENERIC_MMC
66 #define CONFIG_MV_SDHCI
67 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
70 * SATA/SCSI/AHCI configuration
73 #define CONFIG_SCSI_AHCI
74 #define CONFIG_SCSI_AHCI_PLAT
75 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
76 #define CONFIG_SYS_SCSI_MAX_LUN 1
77 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
78 CONFIG_SYS_SCSI_MAX_LUN)
80 /* Partition support */
81 #define CONFIG_DOS_PARTITION
82 #define CONFIG_EFI_PARTITION
84 /* Additional FS support/configuration */
85 #define CONFIG_SUPPORT_VFAT
87 /* USB/EHCI configuration */
88 #define CONFIG_USB_EHCI
89 #define CONFIG_USB_STORAGE
90 #define CONFIG_USB_EHCI_MARVELL
91 #define CONFIG_EHCI_IS_TDI
93 /* Environment in SPI NOR flash */
94 #define CONFIG_ENV_IS_IN_SPI_FLASH
95 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
96 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
97 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
99 #define CONFIG_PHY_MARVELL /* there is a marvell phy */
100 #define CONFIG_PHY_ADDR { 1, 0 }
101 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
102 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
104 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
105 #define CONFIG_SYS_ALT_MEMTEST
107 /* Keep device tree and initrd in lower memory so the kernel can access them */
108 #define CONFIG_EXTRA_ENV_SETTINGS \
109 "fdt_high=0x10000000\0" \
110 "initrd_high=0x10000000\0"
114 * Select the boot device here
116 * Currently supported are:
117 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
118 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
120 #define SPL_BOOT_SPI_NOR_FLASH 1
121 #define SPL_BOOT_SDIO_MMC_CARD 2
122 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
124 /* Defines for SPL */
125 #define CONFIG_SPL_FRAMEWORK
126 #define CONFIG_SPL_SIZE (140 << 10)
127 #define CONFIG_SPL_TEXT_BASE 0x40000030
128 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
130 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
131 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
133 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
134 CONFIG_SPL_BSS_MAX_SIZE)
135 #define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10)
137 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
138 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
140 #define CONFIG_SPL_LIBCOMMON_SUPPORT
141 #define CONFIG_SPL_LIBGENERIC_SUPPORT
142 #define CONFIG_SPL_SERIAL_SUPPORT
143 #define CONFIG_SPL_I2C_SUPPORT
145 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
146 /* SPL related SPI defines */
147 #define CONFIG_SPL_SPI_SUPPORT
148 #define CONFIG_SPL_SPI_FLASH_SUPPORT
149 #define CONFIG_SPL_SPI_LOAD
150 #define CONFIG_SPL_SPI_BUS 0
151 #define CONFIG_SPL_SPI_CS 0
152 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
153 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
156 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
157 /* SPL related MMC defines */
158 #define CONFIG_SPL_MMC_SUPPORT
159 #define CONFIG_SPL_LIBDISK_SUPPORT
160 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
161 #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
162 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
163 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
164 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */
165 #ifdef CONFIG_SPL_BUILD
166 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
170 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
171 #define CONFIG_SYS_MVEBU_DDR_A38X
175 * mv-common.h should be defined after CMD configs since it used them
176 * to enable certain macros
178 #include "mv-common.h"
180 #endif /* _CONFIG_DB_88F6820_GP_H */