2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * Define this to make U-Boot skip low level initialization when loaded
25 * by initial bootloader. Not required by NAND U-Boot version but IS
26 * required for a NOR version used to burn the real NOR U-Boot into
27 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
28 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
29 * NOR U-Boot is loaded directly from Flash so it must perform all the
30 * low level initialization itself. NAND version is loaded by an initial
31 * bootloader (UBL in TI-ese) that performs such an initialization so it's
32 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
33 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
34 * performing low level init prior to loading. All that means we can NOT use
35 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
36 * we can NOT use NOR version because it performs low level initialization
37 * effectively destroying itself in DDR memory. That's why a separate NOR
38 * version with this define is needed. It is loaded via UART, then one uses
39 * it to somehow download a proper NOR version built WITHOUT this define to
40 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
41 * NOR support into the initial bootloader so it won't be needed but DaVinci
42 * static RAM might be too small for this (I have something like 2Kbytes left
43 * as of now, without NOR support) so this might've not happened...
45 #define CONFIG_NOR_UART_BOOT
52 #define CONFIG_SYS_NAND_SMALLPAGE
53 #define CONFIG_SYS_USE_NOR
54 #define MACH_TYPE_SONATA 1254
55 #define CONFIG_MACH_TYPE MACH_TYPE_SONATA
56 /*===================*/
57 /* SoC Configuration */
58 /*===================*/
59 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
60 #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
61 #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
62 #define CONFIG_SYS_HZ 1000
63 #define CONFIG_SOC_DM644X
64 /*====================================================*/
65 /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
66 /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
67 /*====================================================*/
68 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
69 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
70 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
71 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
75 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
76 #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
77 #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
78 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
79 #define PHYS_SDRAM_1 0x80000000 /* DDR Start */
80 #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
81 #define DDR_4BANKS /* 4-bank DDR2 (128MB) */
82 /*====================*/
83 /* Serial Driver info */
84 /*====================*/
85 #define CONFIG_SYS_NS16550
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
88 #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
89 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
90 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
91 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
92 /*===================*/
93 /* I2C Configuration */
94 /*===================*/
95 #define CONFIG_HARD_I2C
96 #define CONFIG_DRIVER_DAVINCI_I2C
97 #define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
98 #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
99 /*==================================*/
100 /* Network & Ethernet Configuration */
101 /*==================================*/
102 #define CONFIG_DRIVER_TI_EMAC
104 #define CONFIG_BOOTP_DEFAULT
105 #define CONFIG_BOOTP_DNS
106 #define CONFIG_BOOTP_DNS2
107 #define CONFIG_BOOTP_SEND_HOSTNAME
108 #define CONFIG_NET_RETRY_COUNT 10
109 /*=====================*/
110 /* Flash & Environment */
111 /*=====================*/
112 #ifdef CONFIG_SYS_USE_NAND
113 #define CONFIG_NAND_DAVINCI
114 #define CONFIG_SYS_NAND_CS 2
115 #undef CONFIG_ENV_IS_IN_FLASH
116 #define CONFIG_SYS_NO_FLASH
117 #define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */
118 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
119 #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
120 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
121 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
122 #define CONFIG_SYS_NAND_BASE 0x02000000
123 #define CONFIG_SYS_NAND_HW_ECC
124 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
125 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
126 #elif defined(CONFIG_SYS_USE_NOR)
127 #ifdef CONFIG_NOR_UART_BOOT
128 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
130 #undef CONFIG_SKIP_LOWLEVEL_INIT
132 #define CONFIG_ENV_IS_IN_FLASH
133 #undef CONFIG_SYS_NO_FLASH
134 #define CONFIG_FLASH_CFI_DRIVER
135 #define CONFIG_SYS_FLASH_CFI
136 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
137 #define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */
138 #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*2)
139 #define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SZ
140 #define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
141 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
142 #define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
143 #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
144 #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */
146 /*==============================*/
147 /* U-Boot general configuration */
148 /*==============================*/
149 #define CONFIG_MISC_INIT_R
150 #undef CONFIG_BOOTDELAY
151 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
152 #define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
153 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
154 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
155 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
156 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
157 #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
158 #define CONFIG_VERSION_VARIABLE
159 #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
160 #define CONFIG_SYS_HUSH_PARSER
161 #define CONFIG_CMDLINE_EDITING
162 #define CONFIG_SYS_LONGHELP
163 #define CONFIG_CRC32_VERIFY
164 #define CONFIG_MX_CYCLIC
165 /*===================*/
166 /* Linux Information */
167 /*===================*/
168 #define LINUX_BOOT_PARAM_ADDR 0x80000100
169 #define CONFIG_CMDLINE_TAG
170 #define CONFIG_SETUP_MEMORY_TAGS
171 #define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
172 #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000"
173 /*=================*/
174 /* U-Boot commands */
175 /*=================*/
176 #include <config_cmd_default.h>
177 #define CONFIG_CMD_ASKENV
178 #define CONFIG_CMD_DHCP
179 #define CONFIG_CMD_DIAG
180 #define CONFIG_CMD_I2C
181 #define CONFIG_CMD_MII
182 #define CONFIG_CMD_PING
183 #define CONFIG_CMD_SAVES
184 #define CONFIG_CMD_EEPROM
185 #undef CONFIG_CMD_BDI
186 #undef CONFIG_CMD_FPGA
187 #undef CONFIG_CMD_SETGETDCR
188 #ifdef CONFIG_SYS_USE_NAND
189 #undef CONFIG_CMD_FLASH
190 #undef CONFIG_CMD_IMLS
191 #define CONFIG_CMD_NAND
192 #elif defined(CONFIG_SYS_USE_NOR)
193 #define CONFIG_CMD_JFFS2
195 #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
198 #ifdef CONFIG_CMD_BDI
199 #define CONFIG_CLOCKS
202 #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
204 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
205 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
206 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
207 CONFIG_SYS_INIT_RAM_SIZE - \
208 GENERATED_GBL_DATA_SIZE)
210 #endif /* __CONFIG_H */