2 * Copyright (C) 2009 David Brownell
4 * SPDX-License-Identifier: GPL-2.0+
10 /* Spectrum Digital TMS320DM355 EVM board */
11 #define DAVINCI_DM355EVM
13 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
14 #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
15 #define CONFIG_SYS_CONSOLE_INFO_QUIET
17 /* SoC Configuration */
18 #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
19 #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
20 #define CONFIG_SOC_DM355
23 #define CONFIG_NR_DRAM_BANKS 1
24 #define PHYS_SDRAM_1 0x80000000
25 #define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
27 /* Serial Driver info: UART0 for console */
28 #define CONFIG_SYS_NS16550
29 #define CONFIG_SYS_NS16550_SERIAL
30 #define CONFIG_SYS_NS16550_REG_SIZE -4
31 #define CONFIG_SYS_NS16550_COM1 0x01c20000
32 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
33 #define CONFIG_CONS_INDEX 1
34 #define CONFIG_BAUDRATE 115200
36 /* Ethernet: external DM9000 */
37 #define CONFIG_DRIVER_DM9000 1
38 #define CONFIG_DM9000_BASE 0x04014000
39 #define DM9000_IO CONFIG_DM9000_BASE
40 #define DM9000_DATA (CONFIG_DM9000_BASE + 2)
43 #define CONFIG_SYS_I2C
44 #define CONFIG_SYS_I2C_DAVINCI
45 #define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
46 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
48 /* NAND: socketed, two chipselects, normally 2 GBytes */
49 #define CONFIG_NAND_DAVINCI
50 #define CONFIG_SYS_NAND_CS 2
51 #define CONFIG_SYS_NAND_USE_FLASH_BBT
52 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
53 #define CONFIG_SYS_NAND_PAGE_2K
55 #define CONFIG_SYS_NAND_LARGEPAGE
56 #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
57 /* socket has two chipselects, nCE0 gated by address BIT(14) */
58 #define CONFIG_SYS_MAX_NAND_DEVICE 1
59 #define CONFIG_SYS_NAND_MAX_CHIPS 2
63 #define CONFIG_GENERIC_MMC
64 #define CONFIG_DAVINCI_MMC
65 #define CONFIG_DAVINCI_MMC_SD1
66 #define CONFIG_MMC_MBLOCK
68 /* USB: OTG connector */
69 /* NYET -- #define CONFIG_USB_DAVINCI */
71 /* U-Boot command configuration */
72 #define CONFIG_CMD_ASKENV
73 #define CONFIG_CMD_DHCP
74 #define CONFIG_CMD_I2C
75 #define CONFIG_CMD_PING
76 #define CONFIG_CMD_SAVES
83 #define CONFIG_DOS_PARTITION
84 #define CONFIG_CMD_EXT2
85 #define CONFIG_CMD_FAT
86 #define CONFIG_CMD_MMC
89 #ifdef CONFIG_NAND_DAVINCI
90 #define CONFIG_CMD_MTDPARTS
91 #define CONFIG_MTD_PARTITIONS
92 #define CONFIG_MTD_DEVICE
93 #define CONFIG_CMD_NAND
94 #define CONFIG_CMD_UBI
98 #ifdef CONFIG_USB_DAVINCI
99 #define CONFIG_MUSB_HCD
100 #define CONFIG_CMD_USB
101 #define CONFIG_USB_STORAGE
103 #undef CONFIG_MUSB_HCD
104 #undef CONFIG_CMD_USB
105 #undef CONFIG_USB_STORAGE
108 #define CONFIG_CRC32_VERIFY
109 #define CONFIG_MX_CYCLIC
111 /* U-Boot general configuration */
112 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
113 #define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
114 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
115 #define CONFIG_SYS_PBSIZE /* Print buffer size */ \
116 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
117 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
118 #define CONFIG_SYS_HUSH_PARSER
119 #define CONFIG_SYS_LONGHELP
121 #ifdef CONFIG_NAND_DAVINCI
122 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
123 #define CONFIG_ENV_IS_IN_NAND
124 #define CONFIG_ENV_OFFSET 0x3C0000
125 #undef CONFIG_ENV_IS_IN_FLASH
128 #if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
129 #define CONFIG_CMD_ENV
130 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
131 #define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
132 #define CONFIG_ENV_IS_IN_MMC
133 #undef CONFIG_ENV_IS_IN_FLASH
136 #define CONFIG_BOOTDELAY 5
137 #define CONFIG_BOOTCOMMAND \
139 #define CONFIG_BOOTARGS \
140 "console=ttyS0,115200n8 " \
141 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
143 #define CONFIG_CMDLINE_EDITING
144 #define CONFIG_VERSION_VARIABLE
145 #define CONFIG_TIMESTAMP
147 #define CONFIG_NET_RETRY_COUNT 10
149 /* U-Boot memory configuration */
150 #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
151 #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
152 #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
154 /* Linux interfacing */
155 #define CONFIG_CMDLINE_TAG
156 #define CONFIG_SETUP_MEMORY_TAGS
157 #define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
158 #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
161 /* NAND configuration ... socketed with two chipselects. It normally comes
162 * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
163 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
164 * pretty much demands the 4-bit ECC support.) You can of course swap in
165 * other parts, including small page ones.
167 * This presents a single read-only partition for all bootloader stuff.
168 * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
169 * some extra space to help cope with bad blocks in that data. Linux
170 * shouldn't care about its detailed layout, and will probably want to use
171 * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to
172 * override this default partitioning using MTDPARTS and cmdlinepart.
174 #define MTDIDS_DEFAULT "nand0=davinci_nand.0"
176 #ifdef CONFIG_SYS_NAND_LARGEPAGE
177 /* Use same layout for 128K/256K blocks; allow some bad blocks */
178 #define PART_BOOT "2m(bootloader)ro,"
180 /* Assume 16K erase blocks; allow a few bad ones. */
181 #define PART_BOOT "512k(bootloader)ro,"
184 #define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
185 #define PART_REST "-(filesystem)"
187 #define MTDPARTS_DEFAULT \
188 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
190 #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
192 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
193 #define CONFIG_SYS_INIT_SP_ADDR \
194 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
196 #endif /* __CONFIG_H */