2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on davinci_dvevm.h. Original Copyrights follow:
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 #define CONFIG_DRIVER_TI_EMAC
30 #define CONFIG_USE_SPIFLASH
36 #define CONFIG_MACH_DAVINCI_DA850_EVM
37 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
38 #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
39 #define CONFIG_SOC_DA850 /* TI DA850 SoC */
40 #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
41 #define CONFIG_SYS_OSCIN_FREQ 24000000
42 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
43 #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
44 #define CONFIG_SYS_HZ 1000
45 #define CONFIG_SKIP_LOWLEVEL_INIT
46 #define CONFIG_SYS_TEXT_BASE 0xc1080000
47 #define CONFIG_SYS_ICACHE_OFF
48 #define CONFIG_SYS_DCACHE_OFF
49 #define CONFIG_SYS_L2CACHE_OFF
54 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
55 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
56 #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
57 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
59 /* memtest start addr */
60 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
62 /* memtest will be run on 16MB */
63 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
65 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
66 #define CONFIG_STACKSIZE (256*1024) /* regular stack */
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_SERIAL
73 #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
74 #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
75 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
76 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
77 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
78 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
81 #define CONFIG_SPI_FLASH
82 #define CONFIG_SPI_FLASH_STMICRO
83 #define CONFIG_SPI_FLASH_WINBOND
84 #define CONFIG_DAVINCI_SPI
85 #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
86 #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
87 #define CONFIG_SF_DEFAULT_SPEED 30000000
88 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
93 #define CONFIG_HARD_I2C
94 #define CONFIG_DRIVER_DAVINCI_I2C
95 #define CONFIG_SYS_I2C_SPEED 25000
96 #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
97 #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20
100 * Flash & Environment
102 #ifdef CONFIG_USE_NAND
103 #undef CONFIG_ENV_IS_IN_FLASH
104 #define CONFIG_NAND_DAVINCI
105 #define CONFIG_SYS_NO_FLASH
106 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
107 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
108 #define CONFIG_ENV_SIZE (128 << 10)
109 #define CONFIG_SYS_NAND_USE_FLASH_BBT
110 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
111 #define CONFIG_SYS_NAND_PAGE_2K
112 #define CONFIG_SYS_NAND_CS 3
113 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
114 #define CONFIG_SYS_CLE_MASK 0x10
115 #define CONFIG_SYS_ALE_MASK 0x8
116 #undef CONFIG_SYS_NAND_HW_ECC
117 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
118 #define NAND_MAX_CHIPS 1
122 * Network & Ethernet Configuration
124 #ifdef CONFIG_DRIVER_TI_EMAC
126 #define CONFIG_BOOTP_DEFAULT
127 #define CONFIG_BOOTP_DNS
128 #define CONFIG_BOOTP_DNS2
129 #define CONFIG_BOOTP_SEND_HOSTNAME
130 #define CONFIG_NET_RETRY_COUNT 10
133 #ifdef CONFIG_USE_NOR
134 #define CONFIG_ENV_IS_IN_FLASH
135 #define CONFIG_FLASH_CFI_DRIVER
136 #define CONFIG_SYS_FLASH_CFI
137 #define CONFIG_SYS_FLASH_PROTECTION
138 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
139 #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */
140 #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3)
141 #define CONFIG_ENV_SIZE (10 << 10) /* 10KB */
142 #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
143 #define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */
144 #define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\
146 #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ
149 #ifdef CONFIG_USE_SPIFLASH
150 #undef CONFIG_ENV_IS_IN_FLASH
151 #undef CONFIG_ENV_IS_IN_NAND
152 #define CONFIG_ENV_IS_IN_SPI_FLASH
153 #define CONFIG_ENV_SIZE (64 << 10)
154 #define CONFIG_ENV_OFFSET (256 << 10)
155 #define CONFIG_ENV_SECT_SIZE (64 << 10)
156 #define CONFIG_SYS_NO_FLASH
160 * U-Boot general configuration
162 #define CONFIG_MISC_INIT_R
163 #define CONFIG_BOARD_EARLY_INIT_F
164 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
165 #define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */
166 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
167 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
168 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
169 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
170 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
171 #define CONFIG_VERSION_VARIABLE
172 #define CONFIG_AUTO_COMPLETE
173 #define CONFIG_SYS_HUSH_PARSER
174 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
175 #define CONFIG_CMDLINE_EDITING
176 #define CONFIG_SYS_LONGHELP
177 #define CONFIG_CRC32_VERIFY
178 #define CONFIG_MX_CYCLIC
183 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
184 #define CONFIG_HWCONFIG /* enable hwconfig */
185 #define CONFIG_CMDLINE_TAG
186 #define CONFIG_REVISION_TAG
187 #define CONFIG_SETUP_MEMORY_TAGS
188 #define CONFIG_BOOTARGS \
189 "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
190 #define CONFIG_BOOTDELAY 3
191 #define CONFIG_EXTRA_ENV_SETTINGS "hwconfig=dsp:wake=yes"
196 #include <config_cmd_default.h>
197 #define CONFIG_CMD_ENV
198 #define CONFIG_CMD_ASKENV
199 #define CONFIG_CMD_DHCP
200 #define CONFIG_CMD_DIAG
201 #define CONFIG_CMD_MII
202 #define CONFIG_CMD_PING
203 #define CONFIG_CMD_SAVES
204 #define CONFIG_CMD_MEMORY
206 #ifndef CONFIG_DRIVER_TI_EMAC
207 #undef CONFIG_CMD_NET
208 #undef CONFIG_CMD_DHCP
209 #undef CONFIG_CMD_MII
210 #undef CONFIG_CMD_PING
213 #ifdef CONFIG_USE_NAND
214 #undef CONFIG_CMD_FLASH
215 #undef CONFIG_CMD_IMLS
216 #define CONFIG_CMD_NAND
218 #define CONFIG_CMD_MTDPARTS
219 #define CONFIG_MTD_DEVICE
220 #define CONFIG_MTD_PARTITIONS
222 #define CONFIG_RBTREE
223 #define CONFIG_CMD_UBI
224 #define CONFIG_CMD_UBIFS
227 #ifdef CONFIG_USE_SPIFLASH
228 #undef CONFIG_CMD_IMLS
229 #undef CONFIG_CMD_FLASH
230 #define CONFIG_CMD_SPI
231 #define CONFIG_CMD_SF
232 #define CONFIG_CMD_SAVEENV
235 #if !defined(CONFIG_USE_NAND) && \
236 !defined(CONFIG_USE_NOR) && \
237 !defined(CONFIG_USE_SPIFLASH)
238 #define CONFIG_ENV_IS_NOWHERE
239 #define CONFIG_SYS_NO_FLASH
240 #define CONFIG_ENV_SIZE (16 << 10)
241 #undef CONFIG_CMD_IMLS
242 #undef CONFIG_CMD_ENV
245 /* additions for new relocation code, must added to all boards */
246 #define CONFIG_SYS_SDRAM_BASE 0xc0000000
247 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
248 GENERATED_GBL_DATA_SIZE)
249 #endif /* __CONFIG_H */