2 * Common board functions for siemens AT91SAM9G45 based boards
3 * (C) Copyright 2013 Siemens AG
6 * U-Boot file: include/configs/at91sam9m10g45ek.h
7 * (C) Copyright 2007-2008
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
11 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/hardware.h>
18 #include <linux/sizes.h>
21 * Warning: changing CONFIG_SYS_TEXT_BASE requires
22 * adapting the initial boot program.
23 * Since the linker has to swallow that define, we must use a pure
27 #define CONFIG_SYS_TEXT_BASE 0x72000000
29 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
33 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
35 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_SKIP_LOWLEVEL_INIT
39 #define CONFIG_BOARD_EARLY_INIT_F
40 #define CONFIG_DISPLAY_CPUINFO
42 #define CONFIG_CMD_BOOTZ
44 /* general purpose I/O */
45 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
46 #define CONFIG_AT91_GPIO
47 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
50 #define CONFIG_ATMEL_USART
51 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
52 #define CONFIG_USART_ID ATMEL_ID_SYS
55 #define CONFIG_AT91_LED
56 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
57 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
59 #define CONFIG_BOOTDELAY 3
64 #define CONFIG_BOOTP_BOOTFILESIZE
65 #define CONFIG_BOOTP_BOOTPATH
66 #define CONFIG_BOOTP_GATEWAY
67 #define CONFIG_BOOTP_HOSTNAME
70 * Command line configuration.
72 #define CONFIG_CMD_PING
73 #define CONFIG_CMD_DHCP
74 #define CONFIG_CMD_NAND
75 #define CONFIG_CMD_USB
78 #define CONFIG_NR_DRAM_BANKS 1
79 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
80 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
82 #define CONFIG_SYS_INIT_SP_ADDR \
83 (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
86 #define CONFIG_SYS_NO_FLASH
89 #ifdef CONFIG_CMD_NAND
90 #define CONFIG_NAND_ATMEL
91 #define CONFIG_SYS_MAX_NAND_DEVICE 1
92 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
93 #define CONFIG_SYS_NAND_DBW_8
95 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
97 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
98 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
99 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
105 #define CONFIG_NET_RETRY_COUNT 20
106 #define CONFIG_AT91_WANTS_COMMON_PHY
109 #define CONFIG_USB_EHCI
110 #define CONFIG_USB_EHCI_ATMEL
111 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
112 #define CONFIG_DOS_PARTITION
113 #define CONFIG_USB_STORAGE
115 /* USB DFU support */
116 #define CONFIG_CMD_MTDPARTS
117 #define CONFIG_MTD_DEVICE
118 #define CONFIG_MTD_PARTITIONS
120 /* DFU class support */
121 #define CONFIG_CMD_DFU
122 #define CONFIG_USB_FUNCTION_DFU
123 #define CONFIG_DFU_NAND
124 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
125 #define DFU_MANIFEST_POLL_TIMEOUT 25000
127 #define CONFIG_SYS_CACHELINE_SIZE SZ_8K
128 #define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6
130 /* bootstrap + u-boot + env in nandflash */
131 #define CONFIG_ENV_IS_IN_NAND
132 #define CONFIG_ENV_OFFSET 0x100000
133 #define CONFIG_ENV_OFFSET_REDUND 0x180000
134 #define CONFIG_ENV_SIZE SZ_128K
136 #define CONFIG_BOOTCOMMAND \
137 "nand read 0x70000000 0x200000 0x300000;" \
139 #define CONFIG_BOOTARGS \
140 "console=ttyS0,115200 earlyprintk " \
141 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
142 "256k(env),256k(env_redundant),256k(spare)," \
143 "512k(dtb),6M(kernel)ro,-(rootfs) " \
144 "root=/dev/mtdblock7 rw rootfstype=jffs2"
146 #define CONFIG_BAUDRATE 115200
148 #define CONFIG_SYS_CBSIZE 256
149 #define CONFIG_SYS_MAXARGS 16
150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
151 sizeof(CONFIG_SYS_PROMPT) + 16)
152 #define CONFIG_SYS_LONGHELP
153 #define CONFIG_CMDLINE_EDITING
154 #define CONFIG_AUTO_COMPLETE
155 #define CONFIG_SYS_HUSH_PARSER
158 * Size of malloc() pool
160 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
163 /* Defines for SPL */
164 #define CONFIG_SPL_FRAMEWORK
165 #define CONFIG_SPL_TEXT_BASE 0x300000
166 #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
167 #define CONFIG_SPL_STACK (SZ_16K)
169 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
170 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
172 #define CONFIG_SPL_LIBCOMMON_SUPPORT
173 #define CONFIG_SPL_LIBGENERIC_SUPPORT
174 #define CONFIG_SPL_SERIAL_SUPPORT
176 #define CONFIG_SPL_BOARD_INIT
177 #define CONFIG_SPL_GPIO_SUPPORT
178 #define CONFIG_SPL_NAND_SUPPORT
179 #define CONFIG_SPL_NAND_DRIVERS
180 #define CONFIG_SPL_NAND_BASE
181 #define CONFIG_SPL_NAND_ECC
182 #define CONFIG_SPL_NAND_RAW_ONLY
183 #define CONFIG_SPL_NAND_SOFTECC
184 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
185 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
186 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
187 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
188 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
190 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
191 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
192 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
193 CONFIG_SYS_NAND_PAGE_SIZE)
194 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
195 #define CONFIG_SYS_NAND_ECCSIZE 256
196 #define CONFIG_SYS_NAND_ECCBYTES 3
197 #define CONFIG_SYS_NAND_OOBSIZE 64
198 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
199 48, 49, 50, 51, 52, 53, 54, 55, \
200 56, 57, 58, 59, 60, 61, 62, 63, }
202 #define CONFIG_SPL_ATMEL_SIZE
203 #define CONFIG_SYS_MASTER_CLOCK 132096000
204 #define AT91_PLL_LOCK_TIMEOUT 1000000
205 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
206 #define CONFIG_SYS_MCKR 0x1301
207 #define CONFIG_SYS_MCKR_CSS 0x1302