2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 //only used in fdl2 .in uart download, the debug infors from serial will break the download process.
24 #define CONFIG_FDL2_PRINT 0
25 #define BOOT_NATIVE_LINUX (0)
27 #define CONFIG_SILENT_CONSOLE
28 #define CONFIG_GPIOLIB 1
31 #define U_BOOT_SPRD_VER 1
32 /*#define SPRD_EVM_TAG_ON 1*/
33 #ifdef SPRD_EVM_TAG_ON
34 #define SPRD_EVM_ADDR_START 0x40006000
35 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 #define CONFIG_L2_OFF 1
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
52 #define CONFIG_SP8810EA
55 #define CHIP_ENDIAN_LITTLE
56 #define SC8800S_LITTLE_ENDIAN FALSE
57 #define _LITTLE_ENDIAN 1
58 #define EXT_MEM_TYPE_DDR 1
61 #define CONFIG_EMMC_BOOT
64 //#define CONFIG_SP8810_MMC
65 #define CONFIG_UEFI_PARTITION
66 #define CONFIG_EFI_PARTITION
67 //#define SPL_USB_DOWNLOAD
68 #define CONFIG_EXT4_SPARSE_DOWNLOAD
69 //#define CONFIG_EMMC_SPL
71 #ifdef CONFIG_EMMC_BOOT
72 #define EMMC_SECTOR_SIZE 512
73 #define CONFIG_SYS_EMMC_U_BOOT_SECTOR_NUM 0x400
76 #define CONFIG_RAM512M
77 #define BB_DRAM_TYPE_256MB_32BIT
78 #define CONFIG_MTD_NAND_SC8810 1
80 #define CONFIG_SYS_HZ 1000
81 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
83 //#define CONFIG_SYS_HUSH_PARSER
85 #ifdef CONFIG_SYS_HUSH_PARSER
86 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
90 #define FIXNV_SIZE (120 * 1024)
92 #define FIXNV_SIZE (64 * 1024)
96 #define MODEM_SIZE (0x800000)
97 #define DSP_SIZE (0x3E0400) /* 3968K */
98 #define VMJALUNA_SIZE (0x64000) /* 400K */
99 #define RUNTIMENV_SIZE (256 * 1024)
100 #define FIRMWARE_SIZE (0x9F8000)
101 #define CONFIG_SPL_LOAD_LEN (0x6000)
105 /*#define CMDLINE_NEED_CONV */
107 #define WATCHDOG_LOAD_VALUE 0x4000
108 #define CONFIG_SYS_STACK_SIZE 0x400
110 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
112 /* NAND BOOT is the only boot method */
113 #define CONFIG_NAND_U_BOOT
114 #define DYNAMIC_CRC_TABLE
115 /* Start copying real U-boot from the second page */
116 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
117 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x78000
118 #define RAM_TYPPE_IS_SDRAM 0
120 /* Load U-Boot to this address */
121 #define CONFIG_SYS_NAND_U_BOOT_DST 0x0f800000
123 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
124 #define CONFIG_SYS_SDRAM_BASE 0x00000000
125 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + 256*1024*1024)
127 #ifdef CONFIG_NAND_SPL
128 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_END - 0x40000)
131 #define CONFIG_MMU_TABLE_ADDR (0x40000000)
132 #define CONFIG_SYS_INIT_SP_ADDR \
133 (CONFIG_SYS_SDRAM_END - 0x10000 - GENERATED_GBL_DATA_SIZE)
135 #define CONFIG_SKIP_LOWLEVEL_INIT
138 #define CONFIG_HW_WATCHDOG
140 #define CONFIG_DISPLAY_CPUINFO
142 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
143 #define CONFIG_SETUP_MEMORY_TAGS 1
144 #define CONFIG_INITRD_TAG 1
150 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
152 * Board has 2 32MB banks of DRAM but there is a bug when using
153 * both so only the first is configured
155 #define CONFIG_NR_DRAM_BANKS 1
157 #define PHYS_SDRAM_1 0x00000000
158 #define PHYS_SDRAM_1_SIZE 0x10000000
159 #if (CONFIG_NR_DRAM_BANKS == 2)
160 #define PHYS_SDRAM_2 0x90000000
161 #define PHYS_SDRAM_2_SIZE 0x02000000
164 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
165 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
166 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
171 #define CONFIG_SPRD_UART 1
172 #define CONFIG_SYS_SC8800X_UART1 1
173 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
174 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
175 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
178 * Flash & Environment
180 /* No NOR flash present */
181 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
182 #define CONFIG_SYS_NO_FLASH 1
183 #define CONFIG_ENV_IS_NOWHERE
184 #define CONFIG_ENV_SIZE (128 * 1024)
186 #define CONFIG_ENV_IS_IN_NAND
187 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
188 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
192 #define CONFIG_NAND_SC8810
193 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
194 #define CONFIG_SYS_MAX_NAND_DEVICE 1
195 #define CONFIG_SYS_NAND_BASE (0x60000000)
196 //#define CONFIG_JFFS2_NAND
197 //#define CONFIG_SPRD_NAND_HWECC
198 #define CONFIG_SYS_NAND_HW_ECC
199 #define CONFIG_SYS_NAND_LARGEPAGE
200 //#define CONFIG_SYS_NAND_5_ADDR_CYCLE
202 #define CONFIG_SYS_64BIT_VSPRINTF
204 #define CONFIG_CMD_MTDPARTS
205 #define CONFIG_MTD_PARTITIONS
206 #define CONFIG_MTD_DEVICE
207 #define CONFIG_CMD_UBI
208 #define CONFIG_RBTREE
210 /* U-Boot general configuration */
211 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
212 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
213 /* Print buffer sz */
214 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
215 sizeof(CONFIG_SYS_PROMPT) + 16)
216 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
217 /* Boot Argument Buffer Size */
218 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
219 #define CONFIG_CMDLINE_EDITING
220 #define CONFIG_SYS_LONGHELP
222 /* support OS choose */
223 #undef CONFIG_BOOTM_NETBSD
224 #undef CONFIG_BOOTM_RTEMS
226 /* U-Boot commands */
227 #include <config_cmd_default.h>
228 #define CONFIG_CMD_NAND
229 #undef CONFIG_CMD_FPGA
230 #undef CONFIG_CMD_LOADS
231 #undef CONFIG_CMD_NET
232 #undef CONFIG_CMD_NFS
233 #undef CONFIG_CMD_SETGETDCR
235 #define CONFIG_ENV_OVERWRITE
237 #ifdef SPRD_EVM_TAG_ON
238 #define CONFIG_BOOTDELAY 0
240 #define CONFIG_BOOTDELAY 0
241 #define CONFIG_ZERO_BOOTDELAY_CHECK
244 #define CONFIG_LOADADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - 4*1024*1024) /* loadaddr env var */
245 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
247 #define xstr(s) str(s)
250 #define MTDIDS_DEFAULT "nand0=sprd-nand"
251 #ifdef CONFIG_G2PHONE
252 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:384k@256k(boot),256k(params),6m(kernel),6m(ramdisk),6m(recovery),70m(system),30m(userdata),7m(cache)"
253 #define CONFIG_BOOTARGS "mem=64M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
254 #elif defined CONFIG_SP8810
255 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),256k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),250m(system),180m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),3840k(productinfo),512k(kpanic)"
256 #define CONFIG_BOOTARGS "mem=240M console=ttyS1,115200n8 init=/init "
259 #define COPY_LINUX_KERNEL_SIZE (0x600000)
260 #define LINUX_INITRD_NAME "modem"
262 #define CONFIG_BOOTCOMMAND "cboot normal"
263 #define CONFIG_EXTRA_ENV_SETTINGS ""
265 #ifdef CONFIG_CMD_NET
266 #define CONFIG_IPADDR 192.168.10.2
267 #define CONFIG_SERVERIP 192.168.10.5
268 #define CONFIG_NETMASK 255.255.255.0
269 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
270 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
273 #define CONFIG_NET_MULTI
274 #define CONFIG_CMD_DNS
275 #define CONFIG_CMD_NFS
276 #define CONFIG_CMD_RARP
277 #define CONFIG_CMD_PING
278 /*#define CONFIG_CMD_SNTP */
281 #define CONFIG_USB_GADGET_SC8800G
282 #define CONFIG_USB_DWC
283 #define CONFIG_USB_GADGET_DUALSPEED
284 //#define CONFIG_USB_ETHER
285 #define CONFIG_CMD_FASTBOOT
286 #define SCRATCH_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
287 #define FB_DOWNLOAD_BUF_SIZE (200*1024*1024)
289 #define CONFIG_MODEM_CALIBERATE
290 #define CONFIG_MODEM_CALI_UART /* uart calibration only */
293 #define CONFIG_UPDATE_TFTP
295 #define CONFIG_OF_LIBFDT
296 #define CONFIG_SYS_MAX_FLASH_BANKS 1
297 #define CONFIG_SYS_MAX_FLASH_SECT 128
301 #define CONFIG_SPLASH_SCREEN
302 #define LCD_BPP LCD_COLOR16
303 //#define CONFIG_LCD_HVGA 1
304 #define CONFIG_LCD_QVGA 1
305 #define CONFIG_MACH_CORI 1
306 //#define CONFIG_LCD_INFO
307 //#define LCD_TEST_PATTERN
308 //#define CONFIG_LCD_LOGO
309 #define CONFIG_LCD_ILI9341_BOE
310 #define CONFIG_SYS_WHITE_ON_BLACK
311 #ifdef LCD_TEST_PATTERN
312 #define CONSOLE_COLOR_RED 0xf800
313 #define CONSOLE_COLOR_GREEN 0x07e0
314 #define CONSOLE_COLOR_YELLOW 0x07e0
315 #define CONSOLE_COLOR_BLUE 0x001f
316 #define CONSOLE_COLOR_MAGENTA 0x001f
317 #define CONSOLE_COLOR_CYAN 0x001f
323 #define CONFIG_CMD_MMC
324 #ifdef CONFIG_CMD_MMC
325 #define CONFIG_CMD_FAT 1
326 #define CONFIG_FAT_WRITE 1
327 #define CONFIG_GENERIC_MMC 1
328 #define CONFIG_SDHCI 1
329 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
330 #define CONFIG_MMC_SDMA 1
331 #define CONFIG_MV_SDHCI 1
332 #define CONFIG_DOS_PARTITION 1
333 #define CONFIG_SYS_MMC_NUM 2
334 #define CONFIG_SYS_MMC_BASE {0x20500000,0x20510000}
337 #define CALIBRATE_ENUM_MS 15000
338 #define CALIBRATE_IO_MS 10000
340 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
341 #define LOW_BAT_VOL_CHG 3200 //3.3V charger connect
343 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
344 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
346 #endif /* __CONFIG_H */