x86: config: link: Display the board model on the screen
[platform/kernel/u-boot.git] / include / configs / coreboot.h
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2008
4  * Graeme Russ, graeme.russ@gmail.com.
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #include <asm/ibmpc.h>
10 /*
11  * board/config.h - configuration options, board specific
12  */
13
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 /*
18  * High Level Configuration Options
19  * (easy to change)
20  */
21 #define CONFIG_SYS_COREBOOT
22 #define CONFIG_SHOW_BOOT_PROGRESS
23 #define CONFIG_LAST_STAGE_INIT
24 #define CONFIG_SYS_VSNPRINTF
25 #define CONFIG_ZBOOT_32
26 #define CONFIG_PHYSMEM
27 #define CONFIG_SYS_EARLY_PCI_INIT
28 #define CONFIG_DISPLAY_BOARDINFO_LATE
29
30 #define CONFIG_LMB
31 #define CONFIG_OF_LIBFDT
32
33 #define CONFIG_BOOTSTAGE
34 #define CONFIG_BOOTSTAGE_REPORT
35 #define CONFIG_BOOTSTAGE_FDT
36 #define CONFIG_CMD_BOOTSTAGE
37 /* Place to stash bootstage data from first-stage U-Boot */
38 #define CONFIG_BOOTSTAGE_STASH          0x0110f000
39 #define CONFIG_BOOTSTAGE_STASH_SIZE     0x7fc
40 #define CONFIG_BOOTSTAGE_USER_COUNT     60
41
42 #define CONFIG_LZO
43 #undef CONFIG_ZLIB
44 #undef CONFIG_GZIP
45
46 /*-----------------------------------------------------------------------
47  * Watchdog Configuration
48  */
49 #undef CONFIG_WATCHDOG
50 #undef CONFIG_HW_WATCHDOG
51
52 /* SATA AHCI storage */
53
54 #define CONFIG_SCSI_AHCI
55
56 #ifdef CONFIG_SCSI_AHCI
57 #define CONFIG_LIBATA
58 #define CONFIG_SYS_64BIT_LBA
59 #define CONFIG_SATA_INTEL               1
60 #define CONFIG_SCSI_DEV_LIST            {PCI_VENDOR_ID_INTEL, \
61                         PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
62         {PCI_VENDOR_ID_INTEL,           \
63                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
64         {PCI_VENDOR_ID_INTEL, \
65                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
66         {PCI_VENDOR_ID_INTEL,           \
67                         PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
68
69 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
70 #define CONFIG_SYS_SCSI_MAX_LUN         1
71 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
72                                          CONFIG_SYS_SCSI_MAX_LUN)
73 #endif
74
75 /* Generic TPM interfaced through LPC bus */
76 #define CONFIG_TPM
77 #define CONFIG_TPM_TIS_LPC
78 #define CONFIG_TPM_TIS_BASE_ADDRESS        0xfed40000
79
80 /*-----------------------------------------------------------------------
81  * Real Time Clock Configuration
82  */
83 #define CONFIG_RTC_MC146818
84 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS  0
85 #define CONFIG_SYS_ISA_IO      CONFIG_SYS_ISA_IO_BASE_ADDRESS
86
87 /*-----------------------------------------------------------------------
88  * Serial Configuration
89  */
90 #define CONFIG_CONS_INDEX               1
91 #define CONFIG_SYS_NS16550
92 #define CONFIG_SYS_NS16550_SERIAL
93 #define CONFIG_SYS_NS16550_REG_SIZE     1
94 #define CONFIG_SYS_NS16550_CLK          1843200
95 #define CONFIG_BAUDRATE                 9600
96 #define CONFIG_SYS_BAUDRATE_TABLE       {300, 600, 1200, 2400, 4800, \
97                                          9600, 19200, 38400, 115200}
98 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
99 #define CONFIG_SYS_NS16550_COM2 UART1_BASE
100 #define CONFIG_SYS_NS16550_PORT_MAPPED
101
102 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,eserial0\0" \
103                                         "stdout=vga,eserial0,cbmem\0" \
104                                         "stderr=vga,eserial0,cbmem\0"
105
106 #define CONFIG_CONSOLE_MUX
107 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
108 #define CONFIG_SYS_STDIO_DEREGISTER
109 #define CONFIG_CBMEM_CONSOLE
110
111 #define CONFIG_CMDLINE_EDITING
112 #define CONFIG_COMMAND_HISTORY
113 #define CONFIG_AUTO_COMPLETE
114 #define CONFIG_SYS_HUSH_PARSER
115
116 #define CONFIG_SUPPORT_VFAT
117 /************************************************************
118  * ATAPI support (experimental)
119  ************************************************************/
120 #define CONFIG_ATAPI
121
122 /************************************************************
123  * DISK Partition support
124  ************************************************************/
125 #define CONFIG_EFI_PARTITION
126 #define CONFIG_DOS_PARTITION
127 #define CONFIG_MAC_PARTITION
128 #define CONFIG_ISO_PARTITION            /* Experimental */
129
130 #define CONFIG_CMD_PART
131 #define CONFIG_CMD_CBFS
132 #define CONFIG_CMD_EXT4
133 #define CONFIG_CMD_EXT4_WRITE
134 #define CONFIG_PARTITION_UUIDS
135
136 /*-----------------------------------------------------------------------
137  * Video Configuration
138  */
139 #define CONFIG_VIDEO
140 #define CONFIG_VIDEO_COREBOOT
141 #define CONFIG_VIDEO_SW_CURSOR
142 #define VIDEO_FB_16BPP_WORD_SWAP
143 #define CONFIG_I8042_KBD
144 #define CONFIG_CFB_CONSOLE
145 #define CONFIG_SYS_CONSOLE_INFO_QUIET
146
147 /* x86 GPIOs are accessed through a PCI device */
148 #define CONFIG_INTEL_ICH6_GPIO
149
150 /*-----------------------------------------------------------------------
151  * Command line configuration.
152  */
153 #include <config_cmd_default.h>
154
155 #define CONFIG_TRACE
156 #define CONFIG_CMD_TRACE
157 #define CONFIG_TRACE_BUFFER_SIZE        (16 << 20)
158 #define CONFIG_TRACE_EARLY_SIZE         (8 << 20)
159 #define CONFIG_TRACE_EARLY
160 #define CONFIG_TRACE_EARLY_ADDR         0x01400000
161
162 #define CONFIG_CMD_BDI
163 #define CONFIG_CMD_BOOTD
164 #define CONFIG_CMD_CONSOLE
165 #define CONFIG_CMD_DATE
166 #define CONFIG_CMD_ECHO
167 #undef CONFIG_CMD_FLASH
168 #define CONFIG_CMD_FPGA
169 #define CONFIG_CMD_FPGA_LOADMK
170 #define CONFIG_CMD_GPIO
171 #define CONFIG_CMD_IMI
172 #undef CONFIG_CMD_IMLS
173 #define CONFIG_CMD_IO
174 #define CONFIG_CMD_IRQ
175 #define CONFIG_CMD_ITEST
176 #define CONFIG_CMD_LOADB
177 #define CONFIG_CMD_LOADS
178 #define CONFIG_CMD_MEMORY
179 #define CONFIG_CMD_MISC
180 #define CONFIG_CMD_NET
181 #undef CONFIG_CMD_NFS
182 #define CONFIG_CMD_PCI
183 #define CONFIG_CMD_PING
184 #define CONFIG_CMD_RUN
185 #define CONFIG_CMD_SAVEENV
186 #define CONFIG_CMD_SETGETDCR
187 #define CONFIG_CMD_SOURCE
188 #define CONFIG_CMD_TIME
189 #define CONFIG_CMD_GETTIME
190 #define CONFIG_CMD_XIMG
191 #define CONFIG_CMD_SCSI
192
193 #define CONFIG_CMD_FAT
194 #define CONFIG_CMD_EXT2
195
196 #define CONFIG_CMD_ZBOOT
197
198 #define CONFIG_BOOTDELAY        2
199 #define CONFIG_BOOTARGS         \
200         "root=/dev/sdb3 init=/sbin/init rootwait ro"
201 #define CONFIG_BOOTCOMMAND      \
202         "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
203
204
205 #if defined(CONFIG_CMD_KGDB)
206 #define CONFIG_KGDB_BAUDRATE                    115200
207 #endif
208
209 /*
210  * Miscellaneous configurable options
211  */
212 #define CONFIG_SYS_LONGHELP
213 #define CONFIG_SYS_CBSIZE                       512
214 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
215                                                  sizeof(CONFIG_SYS_PROMPT) + \
216                                                  16)
217 #define CONFIG_SYS_MAXARGS                      16
218 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
219
220 #define CONFIG_SYS_MEMTEST_START                0x00100000
221 #define CONFIG_SYS_MEMTEST_END                  0x01000000
222 #define CONFIG_SYS_LOAD_ADDR                    0x100000
223
224 /*-----------------------------------------------------------------------
225  * SDRAM Configuration
226  */
227 #define CONFIG_NR_DRAM_BANKS                    4
228
229 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
230 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
231 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
232 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
233 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
234
235 /*-----------------------------------------------------------------------
236  * CPU Features
237  */
238
239 #define CONFIG_SYS_X86_TSC_TIMER
240 #define CONFIG_SYS_PCAT_INTERRUPTS
241 #define CONFIG_SYS_PCAT_TIMER
242 #define CONFIG_SYS_NUM_IRQS                     16
243
244 /*-----------------------------------------------------------------------
245  * Memory organization:
246  * 32kB Stack
247  * 16kB Cache-As-RAM @ 0x19200000
248  * 256kB Monitor
249  * (128kB + Environment Sector Size) malloc pool
250  */
251 #define CONFIG_SYS_STACK_SIZE                   (32 * 1024)
252 #define CONFIG_SYS_CAR_ADDR                     0x19200000
253 #define CONFIG_SYS_CAR_SIZE                     (16 * 1024)
254 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
255 #define CONFIG_SYS_MONITOR_LEN                  (256 * 1024)
256 #define CONFIG_SYS_MALLOC_LEN                   (0x20000 + 128 * 1024)
257
258
259 /* allow to overwrite serial and ethaddr */
260 #define CONFIG_ENV_OVERWRITE
261
262 /*-----------------------------------------------------------------------
263  * FLASH configuration
264  */
265 #define CONFIG_ICH_SPI
266 #define CONFIG_SPI_FLASH
267 #define CONFIG_SPI_FLASH_MACRONIX
268 #define CONFIG_SPI_FLASH_WINBOND
269 #define CONFIG_SPI_FLASH_GIGADEVICE
270 #define CONFIG_SYS_NO_FLASH
271 #define CONFIG_CMD_SF
272 #define CONFIG_CMD_SF_TEST
273 #define CONFIG_CMD_SPI
274 #define CONFIG_SPI
275
276 /*-----------------------------------------------------------------------
277  * Environment configuration
278  */
279 #define CONFIG_ENV_IS_NOWHERE
280 #define CONFIG_ENV_SIZE                 0x01000
281
282 /*-----------------------------------------------------------------------
283  * PCI configuration
284  */
285 #define CONFIG_PCI
286
287 #define CONFIG_CROS_EC
288 #define CONFIG_CROS_EC_LPC
289 #define CONFIG_CMD_CROS_EC
290 #define CONFIG_ARCH_EARLY_INIT_R
291
292 /*-----------------------------------------------------------------------
293  * USB configuration
294  */
295 #define CONFIG_USB_EHCI
296 #define CONFIG_USB_EHCI_PCI
297 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     12
298 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
299 #define CONFIG_USB_STORAGE
300 #define CONFIG_USB_KEYBOARD
301 #define CONFIG_SYS_USB_EVENT_POLL
302
303 #define CONFIG_USB_HOST_ETHER
304 #define CONFIG_USB_ETHER_ASIX
305 #define CONFIG_USB_ETHER_SMSC95XX
306 #define CONFIG_TFTP_TSIZE
307 #define CONFIG_CMD_DHCP
308 #define CONFIG_BOOTP_BOOTFILESIZE
309 #define CONFIG_BOOTP_BOOTPATH
310 #define CONFIG_BOOTP_GATEWAY
311 #define CONFIG_BOOTP_HOSTNAME
312
313 #define CONFIG_CMD_USB
314
315 #define CONFIG_EXTRA_ENV_SETTINGS \
316         CONFIG_STD_DEVICES_SETTINGS
317
318 #endif  /* __CONFIG_H */