2 * Copyright (c) 2011 The Chromium OS Authors.
4 * Graeme Russ, graeme.russ@gmail.com.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/ibmpc.h>
27 * board/config.h - configuration options, board specific
34 * High Level Configuration Options
37 #define CONFIG_SYS_COREBOOT
38 #undef CONFIG_SHOW_BOOT_PROGRESS
39 #define CONFIG_LAST_STAGE_INIT
42 /*-----------------------------------------------------------------------
43 * Watchdog Configuration
45 #undef CONFIG_WATCHDOG
46 #undef CONFIG_HW_WATCHDOG
48 /* SATA AHCI storage */
50 #define CONFIG_SCSI_AHCI
52 #ifdef CONFIG_SCSI_AHCI
53 #define CONFIG_SYS_64BIT_LBA
54 #define CONFIG_SATA_INTEL 1
55 #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
56 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
57 {PCI_VENDOR_ID_INTEL, \
58 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
59 {PCI_VENDOR_ID_INTEL, \
60 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
61 {PCI_VENDOR_ID_INTEL, \
62 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
64 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
65 #define CONFIG_SYS_SCSI_MAX_LUN 1
66 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
67 CONFIG_SYS_SCSI_MAX_LUN)
70 /*-----------------------------------------------------------------------
71 * Real Time Clock Configuration
73 #define CONFIG_RTC_MC146818
74 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
76 /*-----------------------------------------------------------------------
77 * Serial Configuration
79 #define CONFIG_CONS_INDEX 1
80 #define CONFIG_SYS_NS16550
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE 1
83 #define CONFIG_SYS_NS16550_CLK 1843200
84 #define CONFIG_BAUDRATE 9600
85 #define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
86 9600, 19200, 38400, 115200}
87 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
88 #define CONFIG_SYS_NS16550_COM2 UART1_BASE
89 #define CONFIG_SYS_NS16550_PORT_MAPPED
92 #define CONFIG_SYS_IDE_MAXBUS 1
93 /* max. 1 drive per IDE bus */
94 #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
96 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
97 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
98 #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
99 #define CONFIG_SYS_ATA_DATA_OFFSET 0
100 #define CONFIG_SYS_ATA_REG_OFFSET 0
101 #define CONFIG_SYS_ATA_ALT_OFFSET 0x200
104 #define CONFIG_SUPPORT_VFAT
105 /************************************************************
106 * ATAPI support (experimental)
107 ************************************************************/
110 /************************************************************
111 * DISK Partition support
112 ************************************************************/
113 #define CONFIG_DOS_PARTITION
114 #define CONFIG_MAC_PARTITION
115 #define CONFIG_ISO_PARTITION /* Experimental */
117 #define CONFIG_CMD_CBFS
118 #define CONFIG_CMD_EXT4
119 #define CONFIG_CMD_EXT4_WRITE
121 /*-----------------------------------------------------------------------
122 * Video Configuration
125 #undef CONFIG_CFB_CONSOLE
127 /*-----------------------------------------------------------------------
128 * Command line configuration.
130 #include <config_cmd_default.h>
132 #define CONFIG_CMD_BDI
133 #define CONFIG_CMD_BOOTD
134 #define CONFIG_CMD_CONSOLE
135 #define CONFIG_CMD_DATE
136 #define CONFIG_CMD_ECHO
137 #undef CONFIG_CMD_FLASH
138 #define CONFIG_CMD_FPGA
139 #define CONFIG_CMD_IMI
140 #undef CONFIG_CMD_IMLS
141 #define CONFIG_CMD_IRQ
142 #define CONFIG_CMD_ITEST
143 #define CONFIG_CMD_LOADB
144 #define CONFIG_CMD_LOADS
145 #define CONFIG_CMD_MEMORY
146 #define CONFIG_CMD_MISC
147 #define CONFIG_CMD_NET
148 #undef CONFIG_CMD_NFS
149 #define CONFIG_CMD_PCI
150 #define CONFIG_CMD_PING
151 #define CONFIG_CMD_RUN
152 #define CONFIG_CMD_SAVEENV
153 #define CONFIG_CMD_SETGETDCR
154 #define CONFIG_CMD_SOURCE
155 #define CONFIG_CMD_XIMG
156 #define CONFIG_CMD_IDE
157 #define CONFIG_CMD_FAT
158 #define CONFIG_CMD_EXT2
160 #define CONFIG_BOOTDELAY 2
161 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
163 #if defined(CONFIG_CMD_KGDB)
164 #define CONFIG_KGDB_BAUDRATE 115200
165 #define CONFIG_KGDB_SER_INDEX 2
169 * Miscellaneous configurable options
171 #define CONFIG_SYS_LONGHELP
172 #define CONFIG_SYS_PROMPT "boot > "
173 #define CONFIG_SYS_CBSIZE 256
174 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
175 sizeof(CONFIG_SYS_PROMPT) + \
177 #define CONFIG_SYS_MAXARGS 16
178 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
180 #define CONFIG_SYS_MEMTEST_START 0x00100000
181 #define CONFIG_SYS_MEMTEST_END 0x01000000
182 #define CONFIG_SYS_LOAD_ADDR 0x100000
183 #define CONFIG_SYS_HZ 1000
184 #define CONFIG_SYS_X86_ISR_TIMER
186 /*-----------------------------------------------------------------------
187 * SDRAM Configuration
189 #define CONFIG_NR_DRAM_BANKS 4
191 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
192 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
193 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
194 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
195 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
197 /*-----------------------------------------------------------------------
201 #define CONFIG_SYS_GENERIC_TIMER
202 #define CONFIG_SYS_PCAT_INTERRUPTS
203 #define CONFIG_SYS_NUM_IRQS 16
205 /*-----------------------------------------------------------------------
206 * Memory organization:
208 * 16kB Cache-As-RAM @ 0x19200000
210 * (128kB + Environment Sector Size) malloc pool
212 #define CONFIG_SYS_STACK_SIZE (32 * 1024)
213 #define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024)
214 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
215 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
216 #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
217 /* Address of temporary Global Data */
218 #define CONFIG_SYS_INIT_GD_ADDR (256 * 1024)
221 /* allow to overwrite serial and ethaddr */
222 #define CONFIG_ENV_OVERWRITE
224 /*-----------------------------------------------------------------------
225 * FLASH configuration
227 #define CONFIG_SYS_NO_FLASH
228 #undef CONFIG_FLASH_CFI_DRIVER
229 #define CONFIG_SYS_MAX_FLASH_SECT 1
230 #define CONFIG_SYS_MAX_FLASH_BANKS 1
232 /*-----------------------------------------------------------------------
233 * Environment configuration
235 #define CONFIG_ENV_IS_NOWHERE
236 #define CONFIG_ENV_SIZE 0x01000
238 /*-----------------------------------------------------------------------
243 #endif /* __CONFIG_H */