include/configs/controlcenterdc.h

   1 /*
   2  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
   3  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _CONFIG_CONTROLCENTERDC_H
   9 #define _CONFIG_CONTROLCENTERDC_H
  10
  11 /*
  12  * High Level Configuration Options (easy to change)
  13  */
  14 #define CONFIG_CUSTOMER_BOARD_SUPPORT
  15
  16 #define CONFIG_SKIP_LOWLEVEL_INIT       /* disable board lowlevel_init */
  17 #define CONFIG_DISPLAY_BOARDINFO_LATE
  18 #define CONFIG_BOARD_LATE_INIT
  19 #define CONFIG_LAST_STAGE_INIT
  20
  21 /*
  22  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  23  * for DDR ECC byte filling in the SPL before loading the main
  24  * U-Boot into it.
  25  */
  26 #define CONFIG_SYS_TEXT_BASE    0x00800000
  27
  28 #define CONFIG_SYS_TCLK         250000000       /* 250MHz */
  29
  30 #define CONFIG_LOADADDR                 1000000
  31
  32 /*
  33  * Commands configuration
  34  */
  35 #define CONFIG_CMD_I2C
  36 #define CONFIG_CMD_PCI
  37 #define CONFIG_CMD_SCSI
  38 #define CONFIG_CMD_SPI
  39
  40 /* SPI NOR flash default params, used by sf commands */
  41 #define CONFIG_SF_DEFAULT_BUS           1
  42 #define CONFIG_SF_DEFAULT_SPEED         1000000
  43 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_3
  44
  45 /*
  46  * SDIO/MMC Card Configuration
  47  */
  48 #define CONFIG_SYS_MMC_BASE             MVEBU_SDIO_BASE
  49
  50 /*
  51  * SATA/SCSI/AHCI configuration
  52  */
  53 #define CONFIG_LIBATA
  54 #define CONFIG_SCSI_AHCI
  55 #define CONFIG_SCSI_AHCI_PLAT
  56 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
  57 #define CONFIG_SYS_SCSI_MAX_LUN         1
  58 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  59                                          CONFIG_SYS_SCSI_MAX_LUN)
  60
  61 /* Additional FS support/configuration */
  62 #define CONFIG_SUPPORT_VFAT
  63
  64 /* USB/EHCI configuration */
  65 #define CONFIG_EHCI_IS_TDI
  66
  67 /* Environment in SPI NOR flash */
  68 #define CONFIG_ENV_IS_IN_SPI_FLASH
  69 #define CONFIG_ENV_SPI_BUS              1
  70 #define CONFIG_ENV_OFFSET               (1 << 20) /* 1MiB in */
  71 #define CONFIG_ENV_SIZE                 (64 << 10) /* 64KiB */
  72 #define CONFIG_ENV_SECT_SIZE            (256 << 10) /* 256KiB sectors */
  73
  74 #define CONFIG_PHY_MARVELL              /* there is a marvell phy */
  75 #define PHY_ANEG_TIMEOUT        8000    /* PHY needs a longer aneg time */
  76
  77 /* PCIe support */
  78 #ifndef CONFIG_SPL_BUILD
  79 #define CONFIG_PCI
  80 #define CONFIG_PCI_MVEBU
  81 #define CONFIG_PCI_PNP
  82 #define CONFIG_PCI_SCAN_SHOW
  83 #endif
  84
  85 #define CONFIG_SYS_ALT_MEMTEST
  86
  87 /*
  88  * Software (bit-bang) MII driver configuration
  89  */
  90 #define CONFIG_BITBANGMII               /* bit-bang MII PHY management */
  91 #define CONFIG_BITBANGMII_MULTI
  92
  93 /* SPL */
  94 /*
  95  * Select the boot device here
  96  *
  97  * Currently supported are:
  98  * SPL_BOOT_SPI_NOR_FLASH       - Booting via SPI NOR flash
  99  * SPL_BOOT_SDIO_MMC_CARD       - Booting via SDIO/MMC card (partition 1)
 100  */
 101 #define SPL_BOOT_SPI_NOR_FLASH          1
 102 #define SPL_BOOT_SDIO_MMC_CARD          2
 103 #define CONFIG_SPL_BOOT_DEVICE          SPL_BOOT_SPI_NOR_FLASH
 104
 105 /* Defines for SPL */
 106 #define CONFIG_SPL_FRAMEWORK
 107 #define CONFIG_SPL_SIZE                 (160 << 10)
 108
 109 #if defined(CONFIG_SECURED_MODE_IMAGE)
 110 #define CONFIG_SPL_TEXT_BASE            0x40002614
 111 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x2614)
 112 #else
 113 #define CONFIG_SPL_TEXT_BASE            0x40000030
 114 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x30)
 115 #endif
 116
 117 #define CONFIG_SPL_BSS_START_ADDR       (0x40000000 + CONFIG_SPL_SIZE)
 118 #define CONFIG_SPL_BSS_MAX_SIZE         (16 << 10)
 119
 120 #ifdef CONFIG_SPL_BUILD
 121 #define CONFIG_SYS_MALLOC_SIMPLE
 122 #endif
 123
 124 #define CONFIG_SPL_STACK                (0x40000000 + ((212 - 16) << 10))
 125 #define CONFIG_SPL_BOOTROM_SAVE         (CONFIG_SPL_STACK + 4)
 126
 127 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 128 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 129 #define CONFIG_SPL_SERIAL_SUPPORT
 130 #define CONFIG_SPL_I2C_SUPPORT
 131
 132 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
 133 /* SPL related SPI defines */
 134 #define CONFIG_SPL_SPI_LOAD
 135 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x30000
 136 #define CONFIG_SYS_U_BOOT_OFFS          CONFIG_SYS_SPI_U_BOOT_OFFS
 137 #endif
 138
 139 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
 140 /* SPL related MMC defines */
 141 #define CONFIG_SPL_MMC_SUPPORT
 142 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
 143 #define CONFIG_SYS_MMC_U_BOOT_OFFS              (168 << 10)
 144 #define CONFIG_SYS_U_BOOT_OFFS                  CONFIG_SYS_MMC_U_BOOT_OFFS
 145 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
 146 #ifdef CONFIG_SPL_BUILD
 147 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER       0x00180000      /* in SDRAM */
 148 #endif
 149 #endif
 150
 151 /*
 152  * Environment Configuration
 153  */
 154 #define CONFIG_ENV_OVERWRITE
 155
 156 #define CONFIG_BAUDRATE 115200
 157
 158 #define CONFIG_HOSTNAME         ccdc
 159 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 160 #define CONFIG_BOOTFILE         "ccdc.img"
 161
 162 #define CONFIG_PREBOOT          /* enable preboot variable */
 163
 164 #define CONFIG_EXTRA_ENV_SETTINGS                                               \
 165         "netdev=eth1\0"                                         \
 166         "consoledev=ttyS1\0"                                                    \
 167         "u-boot=u-boot.bin\0"                                                   \
 168         "bootfile_addr=1000000\0"                                               \
 169         "keyprogram_addr=3000000\0"                                             \
 170         "keyprogram_file=keyprogram.img\0"                                              \
 171         "fdtfile=controlcenterdc.dtb\0"                                         \
 172         "load=tftpboot ${loadaddr} ${u-boot}\0"                                 \
 173         "mmcdev=0:2\0"                                                          \
 174         "update=sf probe 1:0;"                                                  \
 175                 " sf erase 0 +${filesize};"                                     \
 176                 " sf write ${fileaddr} 0 ${filesize}\0"                         \
 177         "upd=run load update\0"                                                 \
 178         "fdt_high=0x10000000\0"                                                 \
 179         "initrd_high=0x10000000\0"                                              \
 180         "loadkeyprogram=tpm flush_keys;"                                        \
 181                 " mmc rescan;"                                                  \
 182                 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
 183                 " source ${keyprogram_addr}:script@1\0"                         \
 184         "gpio1=gpio@22_25\0"                                                    \
 185         "gpio2=A29\0"                                                           \
 186         "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "    \
 187                   "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"  \
 188         "bootfail=for i in ${blinkseq}; do"                                     \
 189                 " if test $i -eq 0; then"                                       \
 190                 " gpio clear ${gpio1}; gpio set ${gpio2};"                      \
 191                 " elif test $i -eq 1; then"                                     \
 192                 " gpio clear ${gpio1}; gpio clear ${gpio2};"                    \
 193                 " elif test $i -eq 2; then"                                     \
 194                 " gpio set ${gpio1}; gpio set ${gpio2};"                        \
 195                 " else;"                                                        \
 196                 " gpio clear ${gpio1}; gpio set ${gpio2};"                      \
 197                 " fi; sleep 0.12; done\0"
 198
 199 #define CONFIG_NFSBOOTCOMMAND                                                           \
 200         "setenv bootargs root=/dev/nfs rw "                                             \
 201         "nfsroot=${serverip}:${rootpath} "                                              \
 202         "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "   \
 203         "console=${consoledev},${baudrate} ${othbootargs}; "                            \
 204         "tftpboot ${bootfile_addr} ${bootfile}; "                                               \
 205         "bootm ${bootfile_addr}"
 206
 207 #define CONFIG_MMCBOOTCOMMAND                                   \
 208         "setenv bootargs root=/dev/mmcblk0p3 rw rootwait "      \
 209         "console=${consoledev},${baudrate} ${othbootargs}; "    \
 210         "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "       \
 211         "bootm ${bootfile_addr}"
 212
 213 #define CONFIG_BOOTCOMMAND                      \
 214         "if env exists keyprogram; then;"       \
 215         " setenv keyprogram; run nfsboot;"      \
 216         " fi;"                                  \
 217         " run dobootfail"
 218
 219 /*
 220  * mv-common.h should be defined after CMD configs since it used them
 221  * to enable certain macros
 222  */
 223 #include "mv-common.h"
 224
 225 #endif /* _CONFIG_CONTROLCENTERDC_H */