include/configs/controlcenterdc.h

   1 /*
   2  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
   3  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _CONFIG_CONTROLCENTERDC_H
   9 #define _CONFIG_CONTROLCENTERDC_H
  10
  11 /*
  12  * High Level Configuration Options (easy to change)
  13  */
  14 #define CONFIG_CUSTOMER_BOARD_SUPPORT
  15
  16 #define CONFIG_SKIP_LOWLEVEL_INIT       /* disable board lowlevel_init */
  17 #define CONFIG_DISPLAY_BOARDINFO_LATE
  18 #define CONFIG_BOARD_LATE_INIT
  19 #define CONFIG_LAST_STAGE_INIT
  20
  21 /*
  22  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  23  * for DDR ECC byte filling in the SPL before loading the main
  24  * U-Boot into it.
  25  */
  26 #define CONFIG_SYS_TEXT_BASE    0x00800000
  27
  28 #define CONFIG_SYS_TCLK         250000000       /* 250MHz */
  29
  30 #define CONFIG_LOADADDR                 1000000
  31
  32 /*
  33  * Commands configuration
  34  */
  35 #define CONFIG_CMD_I2C
  36 #define CONFIG_CMD_SPI
  37
  38 /* SPI NOR flash default params, used by sf commands */
  39 #define CONFIG_SF_DEFAULT_BUS           1
  40 #define CONFIG_SF_DEFAULT_SPEED         1000000
  41 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_3
  42
  43 /*
  44  * SDIO/MMC Card Configuration
  45  */
  46 #define CONFIG_SYS_MMC_BASE             MVEBU_SDIO_BASE
  47
  48 /*
  49  * SATA/SCSI/AHCI configuration
  50  */
  51 #define CONFIG_SCSI_AHCI_PLAT
  52 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
  53 #define CONFIG_SYS_SCSI_MAX_LUN         1
  54 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  55                                          CONFIG_SYS_SCSI_MAX_LUN)
  56
  57 /* USB/EHCI configuration */
  58 #define CONFIG_EHCI_IS_TDI
  59
  60 /* Environment in SPI NOR flash */
  61 #define CONFIG_ENV_SPI_BUS              1
  62 #define CONFIG_ENV_OFFSET               (1 << 20) /* 1MiB in */
  63 #define CONFIG_ENV_SIZE                 (64 << 10) /* 64KiB */
  64 #define CONFIG_ENV_SECT_SIZE            (256 << 10) /* 256KiB sectors */
  65
  66 #define CONFIG_PHY_MARVELL              /* there is a marvell phy */
  67 #define PHY_ANEG_TIMEOUT        8000    /* PHY needs a longer aneg time */
  68
  69 /* PCIe support */
  70 #ifndef CONFIG_SPL_BUILD
  71 #define CONFIG_PCI
  72 #define CONFIG_PCI_MVEBU
  73 #define CONFIG_PCI_PNP
  74 #define CONFIG_PCI_SCAN_SHOW
  75 #endif
  76
  77 #define CONFIG_SYS_ALT_MEMTEST
  78
  79 /*
  80  * Software (bit-bang) MII driver configuration
  81  */
  82 #define CONFIG_BITBANGMII               /* bit-bang MII PHY management */
  83 #define CONFIG_BITBANGMII_MULTI
  84
  85 /* SPL */
  86 /*
  87  * Select the boot device here
  88  *
  89  * Currently supported are:
  90  * SPL_BOOT_SPI_NOR_FLASH       - Booting via SPI NOR flash
  91  * SPL_BOOT_SDIO_MMC_CARD       - Booting via SDIO/MMC card (partition 1)
  92  */
  93 #define SPL_BOOT_SPI_NOR_FLASH          1
  94 #define SPL_BOOT_SDIO_MMC_CARD          2
  95 #define CONFIG_SPL_BOOT_DEVICE          SPL_BOOT_SPI_NOR_FLASH
  96
  97 /* Defines for SPL */
  98 #define CONFIG_SPL_FRAMEWORK
  99 #define CONFIG_SPL_SIZE                 (160 << 10)
 100
 101 #if defined(CONFIG_SECURED_MODE_IMAGE)
 102 #define CONFIG_SPL_TEXT_BASE            0x40002614
 103 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x2614)
 104 #else
 105 #define CONFIG_SPL_TEXT_BASE            0x40000030
 106 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x30)
 107 #endif
 108
 109 #define CONFIG_SPL_BSS_START_ADDR       (0x40000000 + CONFIG_SPL_SIZE)
 110 #define CONFIG_SPL_BSS_MAX_SIZE         (16 << 10)
 111
 112 #ifdef CONFIG_SPL_BUILD
 113 #define CONFIG_SYS_MALLOC_SIMPLE
 114 #endif
 115
 116 #define CONFIG_SPL_STACK                (0x40000000 + ((212 - 16) << 10))
 117 #define CONFIG_SPL_BOOTROM_SAVE         (CONFIG_SPL_STACK + 4)
 118
 119 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 120 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 121 #define CONFIG_SPL_SERIAL_SUPPORT
 122 #define CONFIG_SPL_I2C_SUPPORT
 123
 124 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
 125 /* SPL related SPI defines */
 126 #define CONFIG_SPL_SPI_LOAD
 127 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x30000
 128 #define CONFIG_SYS_U_BOOT_OFFS          CONFIG_SYS_SPI_U_BOOT_OFFS
 129 #endif
 130
 131 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
 132 /* SPL related MMC defines */
 133 #define CONFIG_SPL_MMC_SUPPORT
 134 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
 135 #define CONFIG_SYS_MMC_U_BOOT_OFFS              (168 << 10)
 136 #define CONFIG_SYS_U_BOOT_OFFS                  CONFIG_SYS_MMC_U_BOOT_OFFS
 137 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
 138 #ifdef CONFIG_SPL_BUILD
 139 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER       0x00180000      /* in SDRAM */
 140 #endif
 141 #endif
 142
 143 /*
 144  * Environment Configuration
 145  */
 146 #define CONFIG_ENV_OVERWRITE
 147
 148 #define CONFIG_BAUDRATE 115200
 149
 150 #define CONFIG_HOSTNAME         ccdc
 151 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 152 #define CONFIG_BOOTFILE         "ccdc.img"
 153
 154 #define CONFIG_PREBOOT          /* enable preboot variable */
 155
 156 #define CONFIG_EXTRA_ENV_SETTINGS                                               \
 157         "netdev=eth1\0"                                         \
 158         "consoledev=ttyS1\0"                                                    \
 159         "u-boot=u-boot.bin\0"                                                   \
 160         "bootfile_addr=1000000\0"                                               \
 161         "keyprogram_addr=3000000\0"                                             \
 162         "keyprogram_file=keyprogram.img\0"                                              \
 163         "fdtfile=controlcenterdc.dtb\0"                                         \
 164         "load=tftpboot ${loadaddr} ${u-boot}\0"                                 \
 165         "mmcdev=0:2\0"                                                          \
 166         "update=sf probe 1:0;"                                                  \
 167                 " sf erase 0 +${filesize};"                                     \
 168                 " sf write ${fileaddr} 0 ${filesize}\0"                         \
 169         "upd=run load update\0"                                                 \
 170         "fdt_high=0x10000000\0"                                                 \
 171         "initrd_high=0x10000000\0"                                              \
 172         "loadkeyprogram=tpm flush_keys;"                                        \
 173                 " mmc rescan;"                                                  \
 174                 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
 175                 " source ${keyprogram_addr}:script@1\0"                         \
 176         "gpio1=gpio@22_25\0"                                                    \
 177         "gpio2=A29\0"                                                           \
 178         "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "    \
 179                   "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"  \
 180         "bootfail=for i in ${blinkseq}; do"                                     \
 181                 " if test $i -eq 0; then"                                       \
 182                 " gpio clear ${gpio1}; gpio set ${gpio2};"                      \
 183                 " elif test $i -eq 1; then"                                     \
 184                 " gpio clear ${gpio1}; gpio clear ${gpio2};"                    \
 185                 " elif test $i -eq 2; then"                                     \
 186                 " gpio set ${gpio1}; gpio set ${gpio2};"                        \
 187                 " else;"                                                        \
 188                 " gpio clear ${gpio1}; gpio set ${gpio2};"                      \
 189                 " fi; sleep 0.12; done\0"
 190
 191 #define CONFIG_NFSBOOTCOMMAND                                                           \
 192         "setenv bootargs root=/dev/nfs rw "                                             \
 193         "nfsroot=${serverip}:${rootpath} "                                              \
 194         "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "   \
 195         "console=${consoledev},${baudrate} ${othbootargs}; "                            \
 196         "tftpboot ${bootfile_addr} ${bootfile}; "                                               \
 197         "bootm ${bootfile_addr}"
 198
 199 #define CONFIG_MMCBOOTCOMMAND                                   \
 200         "setenv bootargs root=/dev/mmcblk0p3 rw rootwait "      \
 201         "console=${consoledev},${baudrate} ${othbootargs}; "    \
 202         "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "       \
 203         "bootm ${bootfile_addr}"
 204
 205 #define CONFIG_BOOTCOMMAND                      \
 206         "if env exists keyprogram; then;"       \
 207         " setenv keyprogram; run nfsboot;"      \
 208         " fi;"                                  \
 209         " run dobootfail"
 210
 211 /*
 212  * mv-common.h should be defined after CMD configs since it used them
 213  * to enable certain macros
 214  */
 215 #include "mv-common.h"
 216
 217 #endif /* _CONFIG_CONTROLCENTERDC_H */