include/configs/controlcenterdc.h

   1 /*
   2  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
   3  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _CONFIG_CONTROLCENTERDC_H
   9 #define _CONFIG_CONTROLCENTERDC_H
  10
  11 /*
  12  * High Level Configuration Options (easy to change)
  13  */
  14 #define CONFIG_CUSTOMER_BOARD_SUPPORT
  15
  16 #define CONFIG_SKIP_LOWLEVEL_INIT       /* disable board lowlevel_init */
  17 #define CONFIG_DISPLAY_BOARDINFO_LATE
  18 #define CONFIG_BOARD_LATE_INIT
  19
  20 /*
  21  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  22  * for DDR ECC byte filling in the SPL before loading the main
  23  * U-Boot into it.
  24  */
  25
  26 #define CONFIG_SYS_TCLK         250000000       /* 250MHz */
  27
  28 #define CONFIG_LOADADDR                 1000000
  29
  30 /*
  31  * Commands configuration
  32  */
  33 #define CONFIG_CMD_I2C
  34 #define CONFIG_CMD_SPI
  35
  36 /* SPI NOR flash default params, used by sf commands */
  37 #define CONFIG_SF_DEFAULT_BUS           1
  38 #define CONFIG_SF_DEFAULT_SPEED         1000000
  39 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_3
  40
  41 /*
  42  * SDIO/MMC Card Configuration
  43  */
  44 #define CONFIG_SYS_MMC_BASE             MVEBU_SDIO_BASE
  45
  46 /*
  47  * SATA/SCSI/AHCI configuration
  48  */
  49 #define CONFIG_SCSI_AHCI_PLAT
  50 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
  51 #define CONFIG_SYS_SCSI_MAX_LUN         1
  52 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  53                                          CONFIG_SYS_SCSI_MAX_LUN)
  54
  55 /* USB/EHCI configuration */
  56 #define CONFIG_EHCI_IS_TDI
  57
  58 /* Environment in SPI NOR flash */
  59 #define CONFIG_ENV_SPI_BUS              1
  60 #define CONFIG_ENV_OFFSET               (1 << 20) /* 1MiB in */
  61 #define CONFIG_ENV_SIZE                 (64 << 10) /* 64KiB */
  62 #define CONFIG_ENV_SECT_SIZE            (256 << 10) /* 256KiB sectors */
  63
  64 #define CONFIG_PHY_MARVELL              /* there is a marvell phy */
  65 #define PHY_ANEG_TIMEOUT        8000    /* PHY needs a longer aneg time */
  66
  67 /* PCIe support */
  68 #ifndef CONFIG_SPL_BUILD
  69 #define CONFIG_PCI
  70 #define CONFIG_PCI_MVEBU
  71 #define CONFIG_PCI_PNP
  72 #define CONFIG_PCI_SCAN_SHOW
  73 #endif
  74
  75 /*
  76  * Software (bit-bang) MII driver configuration
  77  */
  78 #define CONFIG_BITBANGMII               /* bit-bang MII PHY management */
  79 #define CONFIG_BITBANGMII_MULTI
  80
  81 /* SPL */
  82 /*
  83  * Select the boot device here
  84  *
  85  * Currently supported are:
  86  * SPL_BOOT_SPI_NOR_FLASH       - Booting via SPI NOR flash
  87  * SPL_BOOT_SDIO_MMC_CARD       - Booting via SDIO/MMC card (partition 1)
  88  */
  89 #define SPL_BOOT_SPI_NOR_FLASH          1
  90 #define SPL_BOOT_SDIO_MMC_CARD          2
  91 #define CONFIG_SPL_BOOT_DEVICE          SPL_BOOT_SPI_NOR_FLASH
  92
  93 /* Defines for SPL */
  94 #define CONFIG_SPL_SIZE                 (160 << 10)
  95
  96 #if defined(CONFIG_SECURED_MODE_IMAGE)
  97 #define CONFIG_SPL_TEXT_BASE            0x40002614
  98 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x2614)
  99 #else
 100 #define CONFIG_SPL_TEXT_BASE            0x40000030
 101 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_SIZE - 0x30)
 102 #endif
 103
 104 #define CONFIG_SPL_BSS_START_ADDR       (0x40000000 + CONFIG_SPL_SIZE)
 105 #define CONFIG_SPL_BSS_MAX_SIZE         (16 << 10)
 106
 107 #ifdef CONFIG_SPL_BUILD
 108 #define CONFIG_SYS_MALLOC_SIMPLE
 109 #endif
 110
 111 #define CONFIG_SPL_STACK                (0x40000000 + ((212 - 16) << 10))
 112 #define CONFIG_SPL_BOOTROM_SAVE         (CONFIG_SPL_STACK + 4)
 113
 114 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 115 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 116 #define CONFIG_SPL_SERIAL_SUPPORT
 117 #define CONFIG_SPL_I2C_SUPPORT
 118
 119 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
 120 /* SPL related SPI defines */
 121 #define CONFIG_SPL_SPI_LOAD
 122 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x30000
 123 #define CONFIG_SYS_U_BOOT_OFFS          CONFIG_SYS_SPI_U_BOOT_OFFS
 124 #endif
 125
 126 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
 127 /* SPL related MMC defines */
 128 #define CONFIG_SPL_MMC_SUPPORT
 129 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
 130 #define CONFIG_SYS_MMC_U_BOOT_OFFS              (168 << 10)
 131 #define CONFIG_SYS_U_BOOT_OFFS                  CONFIG_SYS_MMC_U_BOOT_OFFS
 132 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
 133 #ifdef CONFIG_SPL_BUILD
 134 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER       0x00180000      /* in SDRAM */
 135 #endif
 136 #endif
 137
 138 /*
 139  * Environment Configuration
 140  */
 141 #define CONFIG_ENV_OVERWRITE
 142
 143 #define CONFIG_BAUDRATE 115200
 144
 145 #define CONFIG_HOSTNAME         ccdc
 146 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 147 #define CONFIG_BOOTFILE         "ccdc.img"
 148
 149 #define CONFIG_PREBOOT          /* enable preboot variable */
 150
 151 #define CONFIG_EXTRA_ENV_SETTINGS                                               \
 152         "netdev=eth1\0"                                         \
 153         "consoledev=ttyS1\0"                                                    \
 154         "u-boot=u-boot.bin\0"                                                   \
 155         "bootfile_addr=1000000\0"                                               \
 156         "keyprogram_addr=3000000\0"                                             \
 157         "keyprogram_file=keyprogram.img\0"                                              \
 158         "fdtfile=controlcenterdc.dtb\0"                                         \
 159         "load=tftpboot ${loadaddr} ${u-boot}\0"                                 \
 160         "mmcdev=0:2\0"                                                          \
 161         "update=sf probe 1:0;"                                                  \
 162                 " sf erase 0 +${filesize};"                                     \
 163                 " sf write ${fileaddr} 0 ${filesize}\0"                         \
 164         "upd=run load update\0"                                                 \
 165         "fdt_high=0x10000000\0"                                                 \
 166         "initrd_high=0x10000000\0"                                              \
 167         "loadkeyprogram=tpm flush_keys;"                                        \
 168                 " mmc rescan;"                                                  \
 169                 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
 170                 " source ${keyprogram_addr}:script@1\0"                         \
 171         "gpio1=gpio@22_25\0"                                                    \
 172         "gpio2=A29\0"                                                           \
 173         "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "    \
 174                   "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"  \
 175         "bootfail=for i in ${blinkseq}; do"                                     \
 176                 " if test $i -eq 0; then"                                       \
 177                 " gpio clear ${gpio1}; gpio set ${gpio2};"                      \
 178                 " elif test $i -eq 1; then"                                     \
 179                 " gpio clear ${gpio1}; gpio clear ${gpio2};"                    \
 180                 " elif test $i -eq 2; then"                                     \
 181                 " gpio set ${gpio1}; gpio set ${gpio2};"                        \
 182                 " else;"                                                        \
 183                 " gpio clear ${gpio1}; gpio set ${gpio2};"                      \
 184                 " fi; sleep 0.12; done\0"
 185
 186 #define CONFIG_NFSBOOTCOMMAND                                                           \
 187         "setenv bootargs root=/dev/nfs rw "                                             \
 188         "nfsroot=${serverip}:${rootpath} "                                              \
 189         "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "   \
 190         "console=${consoledev},${baudrate} ${othbootargs}; "                            \
 191         "tftpboot ${bootfile_addr} ${bootfile}; "                                               \
 192         "bootm ${bootfile_addr}"
 193
 194 #define CONFIG_MMCBOOTCOMMAND                                   \
 195         "setenv bootargs root=/dev/mmcblk0p3 rw rootwait "      \
 196         "console=${consoledev},${baudrate} ${othbootargs}; "    \
 197         "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "       \
 198         "bootm ${bootfile_addr}"
 199
 200 #define CONFIG_BOOTCOMMAND                      \
 201         "if env exists keyprogram; then;"       \
 202         " setenv keyprogram; run nfsboot;"      \
 203         " fi;"                                  \
 204         " run dobootfail"
 205
 206 /*
 207  * mv-common.h should be defined after CMD configs since it used them
 208  * to enable certain macros
 209  */
 210 #include "mv-common.h"
 211
 212 #endif /* _CONFIG_CONTROLCENTERDC_H */