1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
7 #ifndef _CONFIG_CONTROLCENTERDC_H
8 #define _CONFIG_CONTROLCENTERDC_H
11 * High Level Configuration Options (easy to change)
13 #define CONFIG_CUSTOMER_BOARD_SUPPORT
15 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
16 #define CONFIG_BOARD_LATE_INIT
19 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
20 * for DDR ECC byte filling in the SPL before loading the main
24 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
26 #define CONFIG_LOADADDR 1000000
28 /* SPI NOR flash default params, used by sf commands */
29 #define CONFIG_SF_DEFAULT_BUS 1
30 #define CONFIG_SF_DEFAULT_SPEED 1000000
31 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
34 * SDIO/MMC Card Configuration
36 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
39 * SATA/SCSI/AHCI configuration
41 #define CONFIG_SCSI_AHCI_PLAT
42 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
43 #define CONFIG_SYS_SCSI_MAX_LUN 1
44 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
45 CONFIG_SYS_SCSI_MAX_LUN)
47 /* USB/EHCI configuration */
48 #define CONFIG_EHCI_IS_TDI
50 /* Environment in SPI NOR flash */
51 #define CONFIG_ENV_SPI_BUS 1
52 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
53 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
54 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
56 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
59 #ifndef CONFIG_SPL_BUILD
60 #define CONFIG_PCI_SCAN_SHOW
64 * Software (bit-bang) MII driver configuration
66 #define CONFIG_BITBANGMII /* bit-bang MII PHY management */
67 #define CONFIG_BITBANGMII_MULTI
71 * Select the boot device here
73 * Currently supported are:
74 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
75 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
77 #define SPL_BOOT_SPI_NOR_FLASH 1
78 #define SPL_BOOT_SDIO_MMC_CARD 2
79 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
82 #define CONFIG_SPL_SIZE (160 << 10)
84 #if defined(CONFIG_SECURED_MODE_IMAGE)
85 #define CONFIG_SPL_TEXT_BASE 0x40002614
86 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
88 #define CONFIG_SPL_TEXT_BASE 0x40000030
89 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
92 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
93 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
95 #ifdef CONFIG_SPL_BUILD
96 #define CONFIG_SYS_MALLOC_SIMPLE
99 #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
100 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
102 #define CONFIG_SPL_LIBCOMMON_SUPPORT
103 #define CONFIG_SPL_LIBGENERIC_SUPPORT
104 #define CONFIG_SPL_I2C_SUPPORT
106 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
107 /* SPL related SPI defines */
108 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
109 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
112 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
113 /* SPL related MMC defines */
114 #define CONFIG_SPL_MMC_SUPPORT
115 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
116 #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
117 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
118 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
119 #ifdef CONFIG_SPL_BUILD
120 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
125 * Environment Configuration
127 #define CONFIG_ENV_OVERWRITE
129 #define CONFIG_BAUDRATE 115200
131 #define CONFIG_HOSTNAME "ccdc"
132 #define CONFIG_ROOTPATH "/opt/nfsroot"
133 #define CONFIG_BOOTFILE "ccdc.img"
135 #define CONFIG_PREBOOT /* enable preboot variable */
137 #define CONFIG_EXTRA_ENV_SETTINGS \
139 "consoledev=ttyS1\0" \
140 "u-boot=u-boot.bin\0" \
141 "bootfile_addr=1000000\0" \
142 "keyprogram_addr=3000000\0" \
143 "keyprogram_file=keyprogram.img\0" \
144 "fdtfile=controlcenterdc.dtb\0" \
145 "load=tftpboot ${loadaddr} ${u-boot}\0" \
147 "update=sf probe 1:0;" \
148 " sf erase 0 +${filesize};" \
149 " sf write ${fileaddr} 0 ${filesize}\0" \
150 "upd=run load update\0" \
151 "fdt_high=0x10000000\0" \
152 "initrd_high=0x10000000\0" \
153 "loadkeyprogram=tpm flush_keys;" \
155 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
156 " source ${keyprogram_addr}:script@1\0" \
157 "gpio1=gpio@22_25\0" \
159 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
160 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
161 "bootfail=for i in ${blinkseq}; do" \
162 " if test $i -eq 0; then" \
163 " gpio clear ${gpio1}; gpio set ${gpio2};" \
164 " elif test $i -eq 1; then" \
165 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
166 " elif test $i -eq 2; then" \
167 " gpio set ${gpio1}; gpio set ${gpio2};" \
169 " gpio clear ${gpio1}; gpio set ${gpio2};" \
170 " fi; sleep 0.12; done\0"
172 #define CONFIG_NFSBOOTCOMMAND \
173 "setenv bootargs root=/dev/nfs rw " \
174 "nfsroot=${serverip}:${rootpath} " \
175 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
176 "console=${consoledev},${baudrate} ${othbootargs}; " \
177 "tftpboot ${bootfile_addr} ${bootfile}; " \
178 "bootm ${bootfile_addr}"
180 #define CONFIG_MMCBOOTCOMMAND \
181 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
182 "console=${consoledev},${baudrate} ${othbootargs}; " \
183 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
184 "bootm ${bootfile_addr}"
186 #define CONFIG_BOOTCOMMAND \
187 "if env exists keyprogram; then;" \
188 " setenv keyprogram; run nfsboot;" \
193 * mv-common.h should be defined after CMD configs since it used them
194 * to enable certain macros
196 #include "mv-common.h"
198 #endif /* _CONFIG_CONTROLCENTERDC_H */