1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
7 #ifndef _CONFIG_CONTROLCENTERDC_H
8 #define _CONFIG_CONTROLCENTERDC_H
11 * High Level Configuration Options (easy to change)
13 #define CONFIG_CUSTOMER_BOARD_SUPPORT
15 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
16 #define CONFIG_BOARD_LATE_INIT
19 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
20 * for DDR ECC byte filling in the SPL before loading the main
24 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
26 #define CONFIG_LOADADDR 1000000
29 * Commands configuration
31 #define CONFIG_CMD_I2C
32 #define CONFIG_CMD_SPI
34 /* SPI NOR flash default params, used by sf commands */
35 #define CONFIG_SF_DEFAULT_BUS 1
36 #define CONFIG_SF_DEFAULT_SPEED 1000000
37 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
40 * SDIO/MMC Card Configuration
42 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
45 * SATA/SCSI/AHCI configuration
47 #define CONFIG_SCSI_AHCI_PLAT
48 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
49 #define CONFIG_SYS_SCSI_MAX_LUN 1
50 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
51 CONFIG_SYS_SCSI_MAX_LUN)
53 /* USB/EHCI configuration */
54 #define CONFIG_EHCI_IS_TDI
56 /* Environment in SPI NOR flash */
57 #define CONFIG_ENV_SPI_BUS 1
58 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
59 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
60 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
62 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
65 #ifndef CONFIG_SPL_BUILD
66 #define CONFIG_PCI_SCAN_SHOW
70 * Software (bit-bang) MII driver configuration
72 #define CONFIG_BITBANGMII /* bit-bang MII PHY management */
73 #define CONFIG_BITBANGMII_MULTI
77 * Select the boot device here
79 * Currently supported are:
80 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
81 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
83 #define SPL_BOOT_SPI_NOR_FLASH 1
84 #define SPL_BOOT_SDIO_MMC_CARD 2
85 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
88 #define CONFIG_SPL_SIZE (160 << 10)
90 #if defined(CONFIG_SECURED_MODE_IMAGE)
91 #define CONFIG_SPL_TEXT_BASE 0x40002614
92 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
94 #define CONFIG_SPL_TEXT_BASE 0x40000030
95 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
98 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
99 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
101 #ifdef CONFIG_SPL_BUILD
102 #define CONFIG_SYS_MALLOC_SIMPLE
105 #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
106 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
108 #define CONFIG_SPL_LIBCOMMON_SUPPORT
109 #define CONFIG_SPL_LIBGENERIC_SUPPORT
110 #define CONFIG_SPL_I2C_SUPPORT
112 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
113 /* SPL related SPI defines */
114 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
115 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
118 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
119 /* SPL related MMC defines */
120 #define CONFIG_SPL_MMC_SUPPORT
121 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
122 #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
123 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
124 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
125 #ifdef CONFIG_SPL_BUILD
126 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
131 * Environment Configuration
133 #define CONFIG_ENV_OVERWRITE
135 #define CONFIG_BAUDRATE 115200
137 #define CONFIG_HOSTNAME "ccdc"
138 #define CONFIG_ROOTPATH "/opt/nfsroot"
139 #define CONFIG_BOOTFILE "ccdc.img"
141 #define CONFIG_PREBOOT /* enable preboot variable */
143 #define CONFIG_EXTRA_ENV_SETTINGS \
145 "consoledev=ttyS1\0" \
146 "u-boot=u-boot.bin\0" \
147 "bootfile_addr=1000000\0" \
148 "keyprogram_addr=3000000\0" \
149 "keyprogram_file=keyprogram.img\0" \
150 "fdtfile=controlcenterdc.dtb\0" \
151 "load=tftpboot ${loadaddr} ${u-boot}\0" \
153 "update=sf probe 1:0;" \
154 " sf erase 0 +${filesize};" \
155 " sf write ${fileaddr} 0 ${filesize}\0" \
156 "upd=run load update\0" \
157 "fdt_high=0x10000000\0" \
158 "initrd_high=0x10000000\0" \
159 "loadkeyprogram=tpm flush_keys;" \
161 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
162 " source ${keyprogram_addr}:script@1\0" \
163 "gpio1=gpio@22_25\0" \
165 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
166 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
167 "bootfail=for i in ${blinkseq}; do" \
168 " if test $i -eq 0; then" \
169 " gpio clear ${gpio1}; gpio set ${gpio2};" \
170 " elif test $i -eq 1; then" \
171 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
172 " elif test $i -eq 2; then" \
173 " gpio set ${gpio1}; gpio set ${gpio2};" \
175 " gpio clear ${gpio1}; gpio set ${gpio2};" \
176 " fi; sleep 0.12; done\0"
178 #define CONFIG_NFSBOOTCOMMAND \
179 "setenv bootargs root=/dev/nfs rw " \
180 "nfsroot=${serverip}:${rootpath} " \
181 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
182 "console=${consoledev},${baudrate} ${othbootargs}; " \
183 "tftpboot ${bootfile_addr} ${bootfile}; " \
184 "bootm ${bootfile_addr}"
186 #define CONFIG_MMCBOOTCOMMAND \
187 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
188 "console=${consoledev},${baudrate} ${othbootargs}; " \
189 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
190 "bootm ${bootfile_addr}"
192 #define CONFIG_BOOTCOMMAND \
193 "if env exists keyprogram; then;" \
194 " setenv keyprogram; run nfsboot;" \
199 * mv-common.h should be defined after CMD configs since it used them
200 * to enable certain macros
202 #include "mv-common.h"
204 #endif /* _CONFIG_CONTROLCENTERDC_H */