1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * include/configs/condor.h
4 * This file is Condor board configuration.
6 * Copyright (C) 2019 Renesas Electronics Corporation
12 #include "rcar-gen3-common.h"
15 #define CONFIG_BITBANGMII_MULTI
17 /* Environment compatibility */
20 #define CONFIG_SH_ETHER_USE_PORT 0
21 #define CONFIG_SH_ETHER_PHY_ADDR 0x1
22 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
23 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
24 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
25 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
26 #define CONFIG_BITBANGMII_MULTI
29 /* XTAL_CLK : 33.33MHz */
30 #define CONFIG_SYS_CLK_FREQ 33333333u
32 /* Generic Timer Definitions (use in assembler source) */
33 #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
35 #endif /* __CONDOR_H */