2 * Copyright 2015-2016 Toradex, Inc.
4 * Configuration settings for the Toradex VF50/VF61 modules.
7 * Copyright 2013 Freescale Semiconductor, Inc.
9 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/imx-regs.h>
17 #define CONFIG_SYS_FSL_CLK
19 #define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
21 #define CONFIG_SKIP_LOWLEVEL_INIT
23 #ifdef CONFIG_CMD_FUSE
24 #define CONFIG_MXC_OCOTP
27 #ifdef CONFIG_VIDEO_FSL_DCU_FB
28 #define CONFIG_SPLASH_SCREEN_ALIGN
29 #define CONFIG_VIDEO_LOGO
30 #define CONFIG_VIDEO_BMP_LOGO
31 #define CONFIG_SYS_FSL_DCU_LE
33 #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
34 #define DCU_LAYER_MAX_NUM 64
37 /* Size of malloc() pool */
38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
40 /* Allow to overwrite serial and ethaddr */
41 #define CONFIG_ENV_OVERWRITE
42 #define CONFIG_ENV_VARS_UBOOT_CONFIG
43 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
46 #define CONFIG_SYS_NAND_ONFI_DETECTION
47 #define CONFIG_SYS_MAX_NAND_DEVICE 1
48 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
50 /* Dynamic MTD partition support */
51 #define CONFIG_MTD_PARTITIONS
52 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
54 #define CONFIG_FSL_ESDHC
55 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
56 #define CONFIG_SYS_FSL_ESDHC_NUM 1
58 #define CONFIG_FEC_MXC
60 #define IMX_FEC_BASE ENET1_BASE_ADDR
61 #define CONFIG_FEC_XCV_TYPE RMII
62 #define CONFIG_FEC_MXC_PHYADDR 0
64 #define CONFIG_IPADDR 192.168.10.2
65 #define CONFIG_NETMASK 255.255.255.0
66 #define CONFIG_SERVERIP 192.168.10.1
68 #define CONFIG_LOADADDR 0x80008000
69 #define CONFIG_FDTADDR 0x84000000
71 /* We boot from the gfxRAM area of the OCRAM. */
72 #define CONFIG_BOARD_SIZE_LIMIT 520192
75 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
76 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
77 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
78 "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
79 "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
80 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
83 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
84 "nfsboot=run setup; " \
85 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
86 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
87 "dhcp ${kernel_addr_r} && " \
88 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
89 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
92 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
93 "ubi.fm_autoconvert=1\0" \
94 "ubiboot=run setup; " \
95 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
96 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
98 "ubi read ${kernel_addr_r} kernel && " \
99 "ubi read ${fdt_addr_r} dtb && " \
100 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
102 #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
104 #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
106 #define CONFIG_EXTRA_ENV_SETTINGS \
107 "kernel_addr_r=0x82000000\0" \
108 "fdt_addr_r=0x84000000\0" \
109 "kernel_file=zImage\0" \
110 "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
111 "fdt_board=eval-v3\0" \
115 "setup=setenv setupargs " \
116 "console=tty1 console=${console}" \
117 ",${baudrate}n8 ${memargs}\0" \
118 "setsdupdate=mmc rescan && set interface mmc && " \
119 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
120 "source ${loadaddr}\0" \
121 "setusbupdate=usb start && set interface usb && " \
122 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
123 "source ${loadaddr}\0" \
124 "setupdate=run setsdupdate || run setusbupdate\0" \
125 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
126 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
127 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \
133 /* Miscellaneous configurable options */
134 #define CONFIG_SYS_LONGHELP /* undef to save memory */
135 #undef CONFIG_AUTO_COMPLETE
136 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
137 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
139 #define CONFIG_SYS_MEMTEST_START 0x80010000
140 #define CONFIG_SYS_MEMTEST_END 0x87C00000
142 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
143 #define CONFIG_SYS_HZ 1000
144 #define CONFIG_CMDLINE_EDITING
146 /* Physical memory map */
147 #define CONFIG_NR_DRAM_BANKS 1
148 #define PHYS_SDRAM (0x80000000)
149 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
151 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
152 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
153 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
155 #define CONFIG_SYS_INIT_SP_OFFSET \
156 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
157 #define CONFIG_SYS_INIT_SP_ADDR \
158 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
160 /* Environment organization */
162 #ifdef CONFIG_ENV_IS_IN_MMC
163 #define CONFIG_SYS_MMC_ENV_DEV 0
164 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
165 #define CONFIG_ENV_SIZE (8 * 1024)
168 #ifdef CONFIG_ENV_IS_IN_NAND
169 #define CONFIG_ENV_SIZE (64 * 2048)
170 #define CONFIG_ENV_RANGE (4 * 64 * 2048)
171 #define CONFIG_ENV_OFFSET (12 * 64 * 2048)
174 /* USB Host Support */
175 #define CONFIG_USB_EHCI_VF
176 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
177 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
180 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)
184 #endif /* __CONFIG_H */