2 * Copyright 2015-2016 Toradex, Inc.
4 * Configuration settings for the Toradex VF50/VF61 modules.
7 * Copyright 2013 Freescale Semiconductor, Inc.
9 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/imx-regs.h>
17 #define CONFIG_SYS_FSL_CLK
19 #define CONFIG_SKIP_LOWLEVEL_INIT
21 #ifdef CONFIG_CMD_FUSE
22 #define CONFIG_MXC_OCOTP
25 #ifdef CONFIG_VIDEO_FSL_DCU_FB
26 #define CONFIG_SPLASH_SCREEN_ALIGN
27 #define CONFIG_VIDEO_LOGO
28 #define CONFIG_VIDEO_BMP_LOGO
29 #define CONFIG_SYS_FSL_DCU_LE
31 #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
32 #define DCU_LAYER_MAX_NUM 64
35 /* Size of malloc() pool */
36 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
40 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
43 #define CONFIG_SYS_NAND_ONFI_DETECTION
44 #define CONFIG_SYS_MAX_NAND_DEVICE 1
45 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
47 /* Dynamic MTD partition support */
48 #define CONFIG_MTD_PARTITIONS
49 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
51 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
52 #define CONFIG_SYS_FSL_ESDHC_NUM 1
54 #define CONFIG_FEC_MXC
56 #define IMX_FEC_BASE ENET1_BASE_ADDR
57 #define CONFIG_FEC_XCV_TYPE RMII
58 #define CONFIG_FEC_MXC_PHYADDR 0
60 #define CONFIG_IPADDR 192.168.10.2
61 #define CONFIG_NETMASK 255.255.255.0
62 #define CONFIG_SERVERIP 192.168.10.1
64 #define CONFIG_LOADADDR 0x80008000
65 #define CONFIG_FDTADDR 0x84000000
67 /* We boot from the gfxRAM area of the OCRAM. */
68 #define CONFIG_BOARD_SIZE_LIMIT 520192
71 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
72 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
73 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
74 "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
75 "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
76 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
79 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
80 "nfsboot=run setup; " \
81 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
82 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
83 "dhcp ${kernel_addr_r} && " \
84 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
85 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
88 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
89 "ubi.fm_autoconvert=1\0" \
90 "ubiboot=run setup; " \
91 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
92 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
94 "ubi read ${kernel_addr_r} kernel && " \
95 "ubi read ${fdt_addr_r} dtb && " \
96 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
98 #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
100 #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
102 #define CONFIG_EXTRA_ENV_SETTINGS \
103 "kernel_addr_r=0x82000000\0" \
104 "fdt_addr_r=0x84000000\0" \
105 "kernel_file=zImage\0" \
106 "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
107 "fdt_board=eval-v3\0" \
111 "setup=setenv setupargs " \
112 "console=tty1 console=${console}" \
113 ",${baudrate}n8 ${memargs}\0" \
114 "setsdupdate=mmc rescan && set interface mmc && " \
115 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
116 "source ${loadaddr}\0" \
117 "setusbupdate=usb start && set interface usb && " \
118 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
119 "source ${loadaddr}\0" \
120 "setupdate=run setsdupdate || run setusbupdate\0" \
121 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
122 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
123 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \
129 /* Miscellaneous configurable options */
130 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
131 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
133 #define CONFIG_SYS_MEMTEST_START 0x80010000
134 #define CONFIG_SYS_MEMTEST_END 0x87C00000
136 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
137 #define CONFIG_SYS_HZ 1000
139 /* Physical memory map */
140 #define CONFIG_NR_DRAM_BANKS 1
141 #define PHYS_SDRAM (0x80000000)
142 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
144 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
145 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
146 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
148 #define CONFIG_SYS_INIT_SP_OFFSET \
149 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
150 #define CONFIG_SYS_INIT_SP_ADDR \
151 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
153 /* Environment organization */
155 #ifdef CONFIG_ENV_IS_IN_MMC
156 #define CONFIG_SYS_MMC_ENV_DEV 0
157 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
158 #define CONFIG_ENV_SIZE (8 * 1024)
161 #ifdef CONFIG_ENV_IS_IN_NAND
162 #define CONFIG_ENV_SIZE (64 * 2048)
163 #define CONFIG_ENV_RANGE (4 * 64 * 2048)
164 #define CONFIG_ENV_OFFSET (12 * 64 * 2048)
167 /* USB Host Support */
168 #define CONFIG_USB_EHCI_VF
169 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
170 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
173 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)
177 #endif /* __CONFIG_H */