Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig
[platform/kernel/u-boot.git] / include / configs / colibri_imx7.h
1 /*
2  * Copyright 2016 Toradex AG
3  *
4  * Configuration settings for the Colibri iMX7 module.
5  *
6  * based on mx7dsabresd.h:
7  * Copyright (C) 2015 Freescale Semiconductor, Inc.
8  *
9  * SPDX-License-Identifier:     GPL-2.0+
10  */
11
12 #ifndef __COLIBRI_IMX7_CONFIG_H
13 #define __COLIBRI_IMX7_CONFIG_H
14
15 #include "mx7_common.h"
16
17 /*#define CONFIG_DBG_MONITOR*/
18 #define PHYS_SDRAM_SIZE                 SZ_512M
19
20 #define CONFIG_DISPLAY_BOARDINFO_LATE   /* Calls show_board_info() */
21
22 #define CONFIG_ENV_VARS_UBOOT_CONFIG
23 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
24
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN           (32 * SZ_1M)
27
28 /* Network */
29 #define CONFIG_FEC_MXC
30 #define CONFIG_MII
31 #define CONFIG_FEC_XCV_TYPE             RMII
32 #define CONFIG_ETHPRIME                 "FEC"
33 #define CONFIG_FEC_MXC_PHYADDR          0
34
35 #define CONFIG_IP_DEFRAG
36 #define CONFIG_TFTP_BLOCKSIZE           16352
37 #define CONFIG_TFTP_TSIZE
38
39 /* ENET1 */
40 #define IMX_FEC_BASE                    ENET_IPS_BASE_ADDR
41
42 /* MMC Config*/
43 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
44 #define CONFIG_SYS_FSL_USDHC_NUM        1
45
46 #undef CONFIG_BOOTM_PLAN9
47 #undef CONFIG_BOOTM_RTEMS
48
49 /* I2C configs */
50 #define CONFIG_SYS_I2C_MXC
51 #define CONFIG_SYS_I2C_SPEED            100000
52
53 #define CONFIG_IPADDR                   192.168.10.2
54 #define CONFIG_NETMASK                  255.255.255.0
55 #define CONFIG_SERVERIP                 192.168.10.1
56
57 #define MEM_LAYOUT_ENV_SETTINGS \
58         "bootm_size=0x10000000\0" \
59         "fdt_addr_r=0x82000000\0" \
60         "fdt_high=0xffffffff\0" \
61         "initrd_high=0xffffffff\0" \
62         "kernel_addr_r=0x81000000\0" \
63         "ramdisk_addr_r=0x82100000\0"
64
65 #define SD_BOOTCMD \
66         "sdargs=root=/dev/mmcblk0p2 rw rootwait\0"      \
67         "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \
68         "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
69         "run m4boot && " \
70         "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \
71         "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
72         "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
73
74 #define NFS_BOOTCMD \
75         "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
76         "nfsboot=run setup; " \
77                 "setenv bootargs ${defargs} ${nfsargs} " \
78                 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
79                 "dhcp ${kernel_addr_r} && "     \
80                 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
81                 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
82
83 #define UBI_BOOTCMD     \
84         "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
85                 "ubi.fm_autoconvert=1\0" \
86         "ubiboot=run setup; " \
87                 "setenv bootargs ${defargs} ${ubiargs} " \
88                 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
89                 "ubi part ubi && run m4boot && " \
90                 "ubi read ${kernel_addr_r} kernel && " \
91                 "ubi read ${fdt_addr_r} dtb && " \
92                 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
93
94 #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
95
96 #define CONFIG_EXTRA_ENV_SETTINGS \
97         MEM_LAYOUT_ENV_SETTINGS \
98         NFS_BOOTCMD \
99         SD_BOOTCMD \
100         UBI_BOOTCMD \
101         "console=ttymxc0\0" \
102         "defargs=\0" \
103         "fdt_board=eval-v3\0" \
104         "fdt_fixup=;\0" \
105         "m4boot=;\0" \
106         "ip_dyn=yes\0" \
107         "kernel_file=zImage\0" \
108         "mtdparts=" MTDPARTS_DEFAULT "\0" \
109         "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
110                 "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
111                 "${board}/flash_eth.img && source ${loadaddr}\0" \
112         "setsdupdate=mmc rescan && setenv interface mmc && " \
113                 "fatload ${interface} 0:1 ${loadaddr} " \
114                 "${board}/flash_blk.img && source ${loadaddr}\0" \
115         "setup=setenv setupargs " \
116                 "console=tty1 console=${console}" \
117                 ",${baudrate}n8 ${memargs} consoleblank=0\0" \
118         "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
119         "setusbupdate=usb start && setenv interface usb && " \
120                 "fatload ${interface} 0:1 ${loadaddr} " \
121                 "${board}/flash_blk.img && source ${loadaddr}\0" \
122         "splashpos=m,m\0" \
123         "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
124         "updlevel=2\0"
125
126 /* Miscellaneous configurable options */
127 #define CONFIG_SYS_LONGHELP
128
129 #define CONFIG_SYS_MEMTEST_START        0x80000000
130 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x0c000000)
131
132 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
133 #define CONFIG_SYS_HZ                   1000
134
135 /* Physical Memory Map */
136 #define CONFIG_NR_DRAM_BANKS            1
137 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
138
139 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
140 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
141 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
142
143 #define CONFIG_SYS_INIT_SP_OFFSET \
144         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
145 #define CONFIG_SYS_INIT_SP_ADDR \
146         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
147
148 /* environment organization */
149
150 #if defined(CONFIG_ENV_IS_IN_MMC)
151 #define CONFIG_SYS_MMC_ENV_DEV          0   /* USDHC1 */
152 #define CONFIG_SYS_MMC_ENV_PART         0       /* user area */
153 #define CONFIG_MMCROOT                  "/dev/mmcblk0p2"  /* USDHC1 */
154 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
155 #elif defined(CONFIG_ENV_IS_IN_NAND)
156 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
157 #define CONFIG_ENV_OFFSET               (28 * CONFIG_ENV_SECT_SIZE)
158 #define CONFIG_ENV_SIZE                 CONFIG_ENV_SECT_SIZE
159 #endif
160
161 #define CONFIG_NAND_MXS
162
163 /* NAND stuff */
164 #define CONFIG_SYS_MAX_NAND_DEVICE      1
165 #define CONFIG_SYS_NAND_BASE            0x40000000
166 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
167 #define CONFIG_SYS_NAND_ONFI_DETECTION
168 #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
169
170 /* Dynamic MTD partition support */
171 #define CONFIG_MTD_PARTITIONS
172 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
173 #define MTDIDS_DEFAULT          "nand0=gpmi-nand"
174 #define MTDPARTS_DEFAULT        "mtdparts=gpmi-nand:"           \
175                                 "512k(mx7-bcb),"                \
176                                 "1536k(u-boot1)ro,"             \
177                                 "1536k(u-boot2)ro,"             \
178                                 "512k(u-boot-env),"             \
179                                 "-(ubi)"
180
181 /* DMA stuff, needed for GPMI/MXS NAND support */
182 #define CONFIG_APBH_DMA
183 #define CONFIG_APBH_DMA_BURST
184 #define CONFIG_APBH_DMA_BURST8
185
186 /* USB Configs */
187 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
188
189 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
190 #define CONFIG_MXC_USB_FLAGS            0
191 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
192
193 #define CONFIG_IMX_THERMAL
194
195 #define CONFIG_USBD_HS
196
197 #define CONFIG_USB_FUNCTION_MASS_STORAGE
198
199 /* USB Device Firmware Update support */
200 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    SZ_16M
201 #define DFU_DEFAULT_POLL_TIMEOUT        300
202
203 #ifdef CONFIG_VIDEO
204 #define CONFIG_VIDEO_MXS
205 #define CONFIG_VIDEO_LOGO
206 #define CONFIG_SPLASH_SCREEN
207 #define CONFIG_SPLASH_SCREEN_ALIGN
208 #define CONFIG_BMP_16BPP
209 #define CONFIG_VIDEO_BMP_RLE8
210 #define CONFIG_VIDEO_BMP_LOGO
211 #endif
212
213 #endif