1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016 Toradex AG
5 * Configuration settings for the Colibri iMX7 module.
7 * based on mx7dsabresd.h:
8 * Copyright (C) 2015 Freescale Semiconductor, Inc.
11 #ifndef __COLIBRI_IMX7_CONFIG_H
12 #define __COLIBRI_IMX7_CONFIG_H
14 #include "mx7_common.h"
16 /*#define CONFIG_DBG_MONITOR*/
17 #define PHYS_SDRAM_SIZE SZ_512M
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
23 #define CONFIG_FEC_MXC
24 #define CONFIG_FEC_XCV_TYPE RMII
25 #define CONFIG_ETHPRIME "FEC"
26 #define CONFIG_FEC_MXC_PHYADDR 0
28 #define CONFIG_IP_DEFRAG
29 #define CONFIG_TFTP_BLOCKSIZE 16352
30 #define CONFIG_TFTP_TSIZE
33 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
37 #define CONFIG_SYS_FSL_USDHC_NUM 1
39 #undef CONFIG_BOOTM_PLAN9
40 #undef CONFIG_BOOTM_RTEMS
43 #define CONFIG_SYS_I2C_MXC
44 #define CONFIG_SYS_I2C_SPEED 100000
46 #define CONFIG_IPADDR 192.168.10.2
47 #define CONFIG_NETMASK 255.255.255.0
48 #define CONFIG_SERVERIP 192.168.10.1
50 #define MEM_LAYOUT_ENV_SETTINGS \
51 "bootm_size=0x10000000\0" \
52 "fdt_addr_r=0x82000000\0" \
53 "fdt_high=0xffffffff\0" \
54 "initrd_high=0xffffffff\0" \
55 "kernel_addr_r=0x81000000\0" \
56 "ramdisk_addr_r=0x82100000\0"
59 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
60 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \
61 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
63 "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \
64 "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
65 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
68 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
69 "nfsboot=run setup; " \
70 "setenv bootargs ${defargs} ${nfsargs} " \
71 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
72 "dhcp ${kernel_addr_r} && " \
73 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
74 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
77 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
78 "ubi.fm_autoconvert=1\0" \
79 "ubiboot=run setup; " \
80 "setenv bootargs ${defargs} ${ubiargs} " \
81 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
82 "ubi part ubi && run m4boot && " \
83 "ubi read ${kernel_addr_r} kernel && " \
84 "ubi read ${fdt_addr_r} dtb && " \
85 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
87 #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
89 #define CONFIG_EXTRA_ENV_SETTINGS \
90 MEM_LAYOUT_ENV_SETTINGS \
96 "fdt_board=eval-v3\0" \
100 "kernel_file=zImage\0" \
101 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
102 "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
103 "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
104 "${board}/flash_eth.img && source ${loadaddr}\0" \
105 "setsdupdate=mmc rescan && setenv interface mmc && " \
106 "fatload ${interface} 0:1 ${loadaddr} " \
107 "${board}/flash_blk.img && source ${loadaddr}\0" \
108 "setup=setenv setupargs " \
109 "console=tty1 console=${console}" \
110 ",${baudrate}n8 ${memargs} consoleblank=0\0" \
111 "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
112 "setusbupdate=usb start && setenv interface usb && " \
113 "fatload ${interface} 0:1 ${loadaddr} " \
114 "${board}/flash_blk.img && source ${loadaddr}\0" \
116 "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
119 /* Miscellaneous configurable options */
121 #define CONFIG_SYS_MEMTEST_START 0x80000000
122 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000)
124 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
125 #define CONFIG_SYS_HZ 1000
127 /* Physical Memory Map */
128 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
130 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
131 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
132 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
134 #define CONFIG_SYS_INIT_SP_OFFSET \
135 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
136 #define CONFIG_SYS_INIT_SP_ADDR \
137 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
139 /* environment organization */
141 #if defined(CONFIG_ENV_IS_IN_MMC)
142 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
143 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
144 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
145 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
146 #elif defined(CONFIG_ENV_IS_IN_NAND)
147 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
148 #define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE)
149 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
153 #define CONFIG_SYS_MAX_NAND_DEVICE 1
154 #define CONFIG_SYS_NAND_BASE 0x40000000
155 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
156 #define CONFIG_SYS_NAND_ONFI_DETECTION
157 #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
159 /* Dynamic MTD partition support */
161 /* DMA stuff, needed for GPMI/MXS NAND support */
164 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
166 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
167 #define CONFIG_MXC_USB_FLAGS 0
168 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
170 #define CONFIG_IMX_THERMAL
172 #define CONFIG_USBD_HS
174 /* USB Device Firmware Update support */
175 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
176 #define DFU_DEFAULT_POLL_TIMEOUT 300
179 #define CONFIG_VIDEO_MXS
180 #define CONFIG_VIDEO_LOGO
181 #define CONFIG_SPLASH_SCREEN
182 #define CONFIG_SPLASH_SCREEN_ALIGN
183 #define CONFIG_BMP_16BPP
184 #define CONFIG_VIDEO_BMP_RLE8
185 #define CONFIG_VIDEO_BMP_LOGO