1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2019 Toradex
6 #ifndef __COLIBRI_IMX8X_H
7 #define __COLIBRI_IMX8X_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_REMAKE_ELF
14 #define CONFIG_DISPLAY_BOARDINFO_LATE
16 #undef CONFIG_BOOTM_NETBSD
18 #define CONFIG_FSL_ESDHC
19 #define CONFIG_FSL_USDHC
20 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
21 #define USDHC1_BASE_ADDR 0x5b010000
22 #define USDHC2_BASE_ADDR 0x5b020000
23 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
25 #define CONFIG_ENV_OVERWRITE
27 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
30 #define FEC_QUIRK_ENET_MAC
32 #define CONFIG_TFTP_BLOCKSIZE SZ_4K
33 #define CONFIG_TFTP_TSIZE
35 #define CONFIG_IPADDR 192.168.10.2
36 #define CONFIG_NETMASK 255.255.255.0
37 #define CONFIG_SERVERIP 192.168.10.1
39 #define MEM_LAYOUT_ENV_SETTINGS \
40 "fdt_addr_r=0x83000000\0" \
41 "kernel_addr_r=0x81000000\0" \
42 "ramdisk_addr_r=0x83800000\0" \
43 "scriptaddr=0x80800000\0"
45 #ifdef CONFIG_AHAB_BOOT
46 #define AHAB_ENV "sec_boot=yes\0"
48 #define AHAB_ENV "sec_boot=no\0"
53 "m4_0_image=m4_0.bin\0" \
54 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
56 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
58 #define MFG_NAND_PARTITION ""
60 #define BOOT_TARGET_DEVICES(func) \
64 #include <config_distro_bootcmd.h>
65 #undef BOOTENV_RUN_NET_USB_START
66 #define BOOTENV_RUN_NET_USB_START ""
68 #define CONFIG_MFG_ENV_SETTINGS \
69 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
70 "rdinit=/linuxrc g_mass_storage.stall=0 " \
71 "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \
72 "g_mass_storage.idProduct=0x37FF " \
73 "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \
74 "${vidargs} clk_ignore_unused\0" \
75 "initrd_addr=0x83800000\0" \
76 "initrd_high=0xffffffff\0" \
77 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \
80 /* Initial environment variables */
81 #define CONFIG_EXTRA_ENV_SETTINGS \
84 CONFIG_MFG_ENV_SETTINGS \
86 MEM_LAYOUT_ENV_SETTINGS \
87 "console=ttyLP3 earlycon\0" \
88 "fdt_addr=0x83000000\0" \
89 "fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
90 "fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
91 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
93 "initrd_addr=0x83800000\0" \
94 "initrd_high=0xffffffffffffffff\0" \
95 "mmcargs=setenv bootargs console=${console},${baudrate} " \
96 "root=PARTUUID=${uuid} rootwait " \
97 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
98 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
99 "netargs=setenv bootargs console=${console},${baudrate} " \
100 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
102 "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \
103 "colibri-imx8x/${fdt_file}; booti ${loadaddr} - " \
106 "script=boot.scr\0" \
107 "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \
108 "if test \"$confirm\" = \"y\"; then " \
109 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
110 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \
112 "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0"
114 /* Link Definitions */
115 #define CONFIG_LOADADDR 0x80280000
117 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
119 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
121 #define CONFIG_SYS_MEMTEST_START 0x88000000
122 #define CONFIG_SYS_MEMTEST_END 0x89000000
124 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
125 #define CONFIG_ENV_SIZE SZ_8K
126 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \
127 CONFIG_TDX_CFG_BLOCK_OFFSET)
128 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 eMMC */
129 #define CONFIG_SYS_MMC_ENV_PART 1
131 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
133 /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
134 #define CONFIG_SYS_FSL_USDHC_NUM 2
136 #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
138 /* Size of malloc() pool */
139 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
141 #define CONFIG_SYS_SDRAM_BASE 0x80000000
142 #define PHYS_SDRAM_1 0x80000000
143 #define PHYS_SDRAM_2 0x880000000
144 #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
145 #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
148 #define CONFIG_BAUDRATE 115200
150 /* Monitor Command Prompt */
151 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
152 #define CONFIG_SYS_CBSIZE SZ_2K
153 #define CONFIG_SYS_MAXARGS 64
154 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
156 sizeof(CONFIG_SYS_PROMPT) + 16)
158 /* Generic Timer Definitions */
159 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
161 #define BOOTAUX_RESERVED_MEM_BASE 0x88000000
162 #define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */
164 #endif /* __COLIBRI_IMX8X_H */