1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2018 Toradex AG
5 * Configuration settings for the Colibri iMX6ULL module.
7 * based on colibri_imx7.h
10 #ifndef __COLIBRI_IMX6ULL_CONFIG_H
11 #define __COLIBRI_IMX6ULL_CONFIG_H
13 #include "mx6_common.h"
14 #define CONFIG_IOMUX_LPSR
16 #define PHYS_SDRAM_SIZE SZ_512M
18 /* Size of malloc() pool */
19 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
22 #define CONFIG_FEC_XCV_TYPE RMII
23 #define CONFIG_ETHPRIME "FEC"
24 #define CONFIG_FEC_MXC_PHYADDR 0
26 #define CONFIG_IP_DEFRAG
27 #define CONFIG_TFTP_BLOCKSIZE 16352
28 #define CONFIG_TFTP_TSIZE
31 #define IMX_FEC_BASE ENET2_BASE_ADDR
34 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
35 #define CONFIG_SYS_FSL_USDHC_NUM 1
37 #undef CONFIG_BOOTM_PLAN9
38 #undef CONFIG_BOOTM_RTEMS
41 #define CONFIG_SYS_I2C_SPEED 100000
43 #define CONFIG_IPADDR 192.168.10.2
44 #define CONFIG_NETMASK 255.255.255.0
45 #define CONFIG_SERVERIP 192.168.10.1
47 #define FDT_FILE "imx6ull-colibri${variant}-${fdt_board}.dtb"
49 #define MEM_LAYOUT_ENV_SETTINGS \
50 "bootm_size=0x10000000\0" \
51 "fdt_addr_r=0x82000000\0" \
52 "fdt_high=0xffffffff\0" \
53 "initrd_high=0xffffffff\0" \
54 "kernel_addr_r=0x81000000\0" \
55 "pxefile_addr_r=0x87100000\0" \
56 "ramdisk_addr_r=0x82100000\0" \
57 "scriptaddr=0x87000000\0"
60 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
61 "nfsboot=run setup; " \
62 "setenv bootargs ${defargs} ${nfsargs} " \
63 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
64 "dhcp ${kernel_addr_r} && " \
65 "tftp ${fdt_addr_r} " FDT_FILE " && " \
66 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
69 "sdargs=root=/dev/mmcblk0p2 ro rootwait\0" \
70 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \
71 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
72 "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \
73 "load mmc 0:1 ${fdt_addr_r} " FDT_FILE " && " \
74 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
77 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \
78 "ubi.fm_autoconvert=1\0" \
79 "ubiboot=run setup; " \
80 "setenv bootargs ${defargs} ${ubiargs} " \
81 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
83 "ubi read ${kernel_addr_r} kernel && " \
84 "ubi read ${fdt_addr_r} dtb && " \
85 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
87 #define CONFIG_BOOTCOMMAND "run ubiboot; " \
88 "setenv fdtfile " FDT_FILE " && run distro_bootcmd;"
90 #define BOOT_TARGET_DEVICES(func) \
94 #include <config_distro_bootcmd.h>
96 #define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5"
98 #define CONFIG_EXTRA_ENV_SETTINGS \
100 MEM_LAYOUT_ENV_SETTINGS \
104 "console=ttymxc0\0" \
105 "defargs=user_debug=30\0" \
106 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
107 "fdt_board=eval-v3\0" \
110 "kernel_file=zImage\0" \
111 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
112 "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
113 "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
114 "${board}/flash_eth.img && source ${loadaddr}\0" \
115 "setsdupdate=mmc rescan && setenv interface mmc && " \
116 "fatload ${interface} 0:1 ${loadaddr} " \
117 "${board}/flash_blk.img && source ${loadaddr}\0" \
118 "setup=setenv setupargs " \
119 "console=tty1 console=${console}" \
120 ",${baudrate}n8 ${memargs} consoleblank=0\0" \
121 "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
122 "setusbupdate=usb start && setenv interface usb && " \
123 "fatload ${interface} 0:1 ${loadaddr} " \
124 "${board}/flash_blk.img && source ${loadaddr}\0" \
126 "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
127 "vidargs=video=mxsfb:640x480-16@60"
129 #define CONFIG_SYS_MEMTEST_START 0x80000000
130 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x08000000)
132 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
134 /* Physical Memory Map */
135 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
137 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
138 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
139 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
141 #define CONFIG_SYS_INIT_SP_OFFSET \
142 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
143 #define CONFIG_SYS_INIT_SP_ADDR \
144 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
146 #if defined(CONFIG_ENV_IS_IN_NAND)
147 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
148 #define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE)
149 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
153 #define CONFIG_SYS_MAX_NAND_DEVICE 1
154 /* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
155 #define CONFIG_SYS_NAND_BASE -1
156 #define CONFIG_SYS_NAND_ONFI_DETECTION
157 #define CONFIG_SYS_NAND_USE_FLASH_BBT
160 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
162 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
163 #define CONFIG_MXC_USB_FLAGS 0
164 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
166 #define CONFIG_IMX_THERMAL
168 #define CONFIG_USBD_HS
170 /* USB Device Firmware Update support */
171 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
172 #define DFU_DEFAULT_POLL_TIMEOUT 300
175 #define CONFIG_VIDEO_MXS
176 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
177 #define CONFIG_VIDEO_LOGO
178 #define CONFIG_SPLASH_SCREEN
179 #define CONFIG_SPLASH_SCREEN_ALIGN
180 #define CONFIG_BMP_16BPP
181 #define CONFIG_VIDEO_BMP_RLE8
182 #define CONFIG_VIDEO_BMP_LOGO