1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
11 * Author: Florian Schlote
13 * For a description of configuration options please refer also to the
14 * general u-boot-1.x.x/README file
19 * board/config.h - configuration options, board specific
23 #ifndef _CONFIG_COBRA5272_H
24 #define _CONFIG_COBRA5272_H
27 * Defines processor clock - important for correct timings concerning serial
32 #define CONFIG_SYS_CLK 66000000
33 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
35 /* Enable Dma Timer */
39 * Define baudrate for UART1 (console output, tftp, ...)
40 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
41 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
46 #define CONFIG_SYS_UART_PORT (0)
49 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
50 * timeout acc. to your needs
51 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
57 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
61 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
62 * bootloader residing in flash ('chainloading'); if you want to use
63 * chainloading or want to compile a u-boot binary that can be loaded into
66 * You will need a first stage bootloader then, e. g. colilo or a working BDM
67 * cable (Background Debug Mode)
69 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
71 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
72 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
78 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
82 * Configuration for environment
83 * Environment is embedded in u-boot in the second sector of the flash
87 #define LDS_BOARD_TEXT \
88 . = DEFINED(env_offset) ? env_offset : .; \
89 env/embedded.o(.text);
94 #define CONFIG_BOOTP_BOOTFILESIZE
97 # define CONFIG_MII_INIT 1
98 # define CONFIG_SYS_DISCOVER_PHY
99 # define CONFIG_SYS_RX_ETH_BUFFER 8
100 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
101 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
102 # ifndef CONFIG_SYS_DISCOVER_PHY
103 # define FECDUPLEX FULL
104 # define FECSPEED _100BASET
106 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
107 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
109 # endif /* CONFIG_SYS_DISCOVER_PHY */
113 *-----------------------------------------------------------------------------
114 * Define user parameters that have to be customized most likely
115 *-----------------------------------------------------------------------------
118 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
120 /* The following settings will be contained in the environment block ; if you
121 want to use a neutral environment all those settings can be manually set in
122 u-boot: 'set' command */
126 enter a valid image address in flash */
128 /* User network settings */
130 #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
131 #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
138 *-----------------------------------------------------------------------------
139 * End of user parameters to be customized
140 *-----------------------------------------------------------------------------
144 * Defines memory range for test
149 * Low Level Configuration Settings
150 * (address mappings, register initial values, etc.)
151 * You should know what you are doing if you make changes here.
156 * Base register address
160 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
163 * System Conf. Reg. & System Protection Reg.
167 #define CONFIG_SYS_SCR 0x0003
168 #define CONFIG_SYS_SPR 0xffff
175 #define CONFIG_SYS_DISCOVER_PHY
176 #define CONFIG_SYS_ENET_BD_BASE 0x780000
178 /*-----------------------------------------------------------------------
179 * Definitions for initial stack pointer and data area (in internal SRAM)
181 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
182 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
183 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
184 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
186 /*-----------------------------------------------------------------------
187 * Start addresses for the final memory configuration
188 * (Set up by the startup code)
189 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
191 #define CONFIG_SYS_SDRAM_BASE 0x00000000
194 *-------------------------------------------------------------------------
195 * RAM SIZE (is defined above)
196 *-----------------------------------------------------------------------
199 /* #define CONFIG_SYS_SDRAM_SIZE 16 */
202 *-----------------------------------------------------------------------
205 #define CONFIG_SYS_FLASH_BASE 0xffe00000
207 #ifdef CONFIG_MONITOR_IS_IN_RAM
208 #define CONFIG_SYS_MONITOR_BASE 0x20000
210 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
213 #define CONFIG_SYS_MONITOR_LEN 0x20000
214 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
217 * For booting Linux, the board info and command line data
218 * have to be in the first 8 MB of memory, since this is
219 * the maximum mapped by the Linux kernel during initialization ??
221 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
223 /*-----------------------------------------------------------------------
226 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
227 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
229 /*-----------------------------------------------------------------------
230 * Cache Configuration
233 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
234 CONFIG_SYS_INIT_RAM_SIZE - 8)
235 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
236 CONFIG_SYS_INIT_RAM_SIZE - 4)
237 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
238 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
239 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
240 CF_ACR_EN | CF_ACR_SM_ALL)
241 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
242 CF_CACR_DISD | CF_CACR_INVI | \
243 CF_CACR_CEIB | CF_CACR_DCM | \
246 /*-----------------------------------------------------------------------
249 #define LED_STAT_0 0xffff /*all LEDs off*/
250 #define LED_STAT_1 0xfffe
251 #define LED_STAT_2 0xfffd
252 #define LED_STAT_3 0xfffb
253 #define LED_STAT_4 0xfff7
254 #define LED_STAT_5 0xffef
255 #define LED_STAT_6 0xffdf
256 #define LED_STAT_7 0xff00 /*all LEDs on*/
258 /*-----------------------------------------------------------------------
259 * Port configuration (GPIO)
261 #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
263 #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
264 (1^=output, 0^=input) */
265 #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
266 #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
268 #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
269 #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
270 #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
272 #endif /* _CONFIG_COBRA5272_H */