2 * Configuation settings for the Sentec Cobra Board.
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
6 * SPDX-License-Identifier: GPL-2.0+
10 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
12 * Author: Florian Schlote
14 * For a description of configuration options please refer also to the
15 * general u-boot-1.x.x/README file
20 * board/config.h - configuration options, board specific
24 #ifndef _CONFIG_COBRA5272_H
25 #define _CONFIG_COBRA5272_H
28 * Defines processor clock - important for correct timings concerning serial
33 #define CONFIG_SYS_CLK 66000000
34 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
37 * Enable use of Ethernet
42 /* Enable Dma Timer */
46 * Define baudrate for UART1 (console output, tftp, ...)
47 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
48 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
53 #define CONFIG_MCFUART
54 #define CONFIG_SYS_UART_PORT (0)
55 #define CONFIG_BAUDRATE 19200
58 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
59 * timeout acc. to your needs
60 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
66 #define CONFIG_WATCHDOG
67 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
71 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
72 * bootloader residing in flash ('chainloading'); if you want to use
73 * chainloading or want to compile a u-boot binary that can be loaded into
76 * You will need a first stage bootloader then, e. g. colilo or a working BDM
77 * cable (Background Debug Mode)
79 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
81 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
82 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
88 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
92 * Configuration for environment
93 * Environment is embedded in u-boot in the second sector of the flash
97 #ifndef CONFIG_MONITOR_IS_IN_RAM
98 #define CONFIG_ENV_OFFSET 0x4000
99 #define CONFIG_ENV_SECT_SIZE 0x2000
100 #define CONFIG_ENV_IS_IN_FLASH 1
102 #define CONFIG_ENV_ADDR 0xffe04000
103 #define CONFIG_ENV_SECT_SIZE 0x2000
104 #define CONFIG_ENV_IS_IN_FLASH 1
107 #define LDS_BOARD_TEXT \
108 . = DEFINED(env_offset) ? env_offset : .; \
109 common/env_embedded.o (.text);
114 #define CONFIG_BOOTP_BOOTFILESIZE
115 #define CONFIG_BOOTP_BOOTPATH
116 #define CONFIG_BOOTP_GATEWAY
117 #define CONFIG_BOOTP_HOSTNAME
120 * Command line configuration.
124 # define CONFIG_MII 1
125 # define CONFIG_MII_INIT 1
126 # define CONFIG_SYS_DISCOVER_PHY
127 # define CONFIG_SYS_RX_ETH_BUFFER 8
128 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
130 # define CONFIG_SYS_FEC0_PINMUX 0
131 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
132 # define MCFFEC_TOUT_LOOP 50000
133 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
134 # ifndef CONFIG_SYS_DISCOVER_PHY
135 # define FECDUPLEX FULL
136 # define FECSPEED _100BASET
138 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
139 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
141 # endif /* CONFIG_SYS_DISCOVER_PHY */
145 *-----------------------------------------------------------------------------
146 * Define user parameters that have to be customized most likely
147 *-----------------------------------------------------------------------------
150 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
152 #define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
153 seconds u-boot will wait before starting defined (auto-)boot command, setting
154 to -1 disables delay, setting to 0 will too prevent access to u-boot command
155 interface: u-boot then has to reflashed */
157 /* The following settings will be contained in the environment block ; if you
158 want to use a neutral environment all those settings can be manually set in
159 u-boot: 'set' command */
163 #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
164 enter a valid image address in flash */
166 #define CONFIG_BOOTARGS " " /* default bootargs that are
167 considered during boot */
169 /* User network settings */
171 #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
172 #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
176 #define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
177 from which user programs will be started */
181 #define CONFIG_SYS_LONGHELP /* undef to save memory */
183 #if defined(CONFIG_CMD_KGDB)
184 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
186 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
188 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
189 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
190 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
193 *-----------------------------------------------------------------------------
194 * End of user parameters to be customized
195 *-----------------------------------------------------------------------------
199 * Defines memory range for test
203 #define CONFIG_SYS_MEMTEST_START 0x400
204 #define CONFIG_SYS_MEMTEST_END 0x380000
207 * Low Level Configuration Settings
208 * (address mappings, register initial values, etc.)
209 * You should know what you are doing if you make changes here.
214 * Base register address
218 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
221 * System Conf. Reg. & System Protection Reg.
225 #define CONFIG_SYS_SCR 0x0003
226 #define CONFIG_SYS_SPR 0xffff
233 #define CONFIG_SYS_DISCOVER_PHY
234 #define CONFIG_SYS_ENET_BD_BASE 0x780000
236 /*-----------------------------------------------------------------------
237 * Definitions for initial stack pointer and data area (in internal SRAM)
239 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
240 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
241 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
242 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
244 /*-----------------------------------------------------------------------
245 * Start addresses for the final memory configuration
246 * (Set up by the startup code)
247 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
249 #define CONFIG_SYS_SDRAM_BASE 0x00000000
252 *-------------------------------------------------------------------------
253 * RAM SIZE (is defined above)
254 *-----------------------------------------------------------------------
257 /* #define CONFIG_SYS_SDRAM_SIZE 16 */
260 *-----------------------------------------------------------------------
263 #define CONFIG_SYS_FLASH_BASE 0xffe00000
265 #ifdef CONFIG_MONITOR_IS_IN_RAM
266 #define CONFIG_SYS_MONITOR_BASE 0x20000
268 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
271 #define CONFIG_SYS_MONITOR_LEN 0x20000
272 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
273 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
276 * For booting Linux, the board info and command line data
277 * have to be in the first 8 MB of memory, since this is
278 * the maximum mapped by the Linux kernel during initialization ??
280 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
282 /*-----------------------------------------------------------------------
285 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
286 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
287 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
289 /*-----------------------------------------------------------------------
290 * Cache Configuration
292 #define CONFIG_SYS_CACHELINE_SIZE 16
294 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
295 CONFIG_SYS_INIT_RAM_SIZE - 8)
296 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
297 CONFIG_SYS_INIT_RAM_SIZE - 4)
298 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
299 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
300 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
301 CF_ACR_EN | CF_ACR_SM_ALL)
302 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
303 CF_CACR_DISD | CF_CACR_INVI | \
304 CF_CACR_CEIB | CF_CACR_DCM | \
307 /*-----------------------------------------------------------------------
308 * Memory bank definitions
310 * Please refer also to Motorola Coldfire user manual - Chapter XXX
311 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
313 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201
314 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014
316 #define CONFIG_SYS_BR1_PRELIM 0
317 #define CONFIG_SYS_OR1_PRELIM 0
319 #define CONFIG_SYS_BR2_PRELIM 0
320 #define CONFIG_SYS_OR2_PRELIM 0
322 #define CONFIG_SYS_BR3_PRELIM 0
323 #define CONFIG_SYS_OR3_PRELIM 0
325 #define CONFIG_SYS_BR4_PRELIM 0
326 #define CONFIG_SYS_OR4_PRELIM 0
328 #define CONFIG_SYS_BR5_PRELIM 0
329 #define CONFIG_SYS_OR5_PRELIM 0
331 #define CONFIG_SYS_BR6_PRELIM 0
332 #define CONFIG_SYS_OR6_PRELIM 0
334 #define CONFIG_SYS_BR7_PRELIM 0x00000701
335 #define CONFIG_SYS_OR7_PRELIM 0xFF00007C
337 /*-----------------------------------------------------------------------
340 #define LED_STAT_0 0xffff /*all LEDs off*/
341 #define LED_STAT_1 0xfffe
342 #define LED_STAT_2 0xfffd
343 #define LED_STAT_3 0xfffb
344 #define LED_STAT_4 0xfff7
345 #define LED_STAT_5 0xffef
346 #define LED_STAT_6 0xffdf
347 #define LED_STAT_7 0xff00 /*all LEDs on*/
349 /*-----------------------------------------------------------------------
350 * Port configuration (GPIO)
352 #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
354 #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
355 (1^=output, 0^=input) */
356 #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
357 #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
359 #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
360 #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
361 #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
363 #endif /* _CONFIG_COBRA5272_H */