2 * Gary Jennejohn <garyj@denx.de>
4 * Configuration settings for the CMC PU2 board.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * If we are developing, we might want to start armboot from ram
30 * so we MUST NOT initialize critical regs like mem-timing ...
32 #define CONFIG_INIT_CRITICAL /* undef for developing */
34 /* ARM asynchronous clock */
35 #define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
36 #define AT91C_MASTER_CLOCK 69120000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
38 #define AT91_SLOW_CLOCK 32768 /* slow clock */
40 #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
41 #define CONFIG_CMC_PU2 1 /* on an CMC_PU2 Board */
42 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44 #define CONFIG_SETUP_MEMORY_TAGS 1
45 #define CONFIG_INITRD_TAG 1
47 /* define this to include the functionality of boot.bin in u-boot */
48 #define CONFIG_BOOTBINFUNC
50 /* just to make sure */
51 #ifndef CONFIG_BOOTBINFUNC
52 #define CONFIG_BOOTBINFUNC
56 * Size of malloc() pool
58 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
59 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
61 #define CONFIG_BAUDRATE 9600
63 #define CFG_AT91C_BRGR_DIVISOR 450 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
69 /* define one of these to choose the DBGU, USART0 or USART1 as console */
74 #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
76 #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
78 #define CONFIG_HARD_I2C
80 #ifdef CONFIG_HARD_I2C
81 #define CFG_I2C_SPEED 0 /* not used */
82 #define CFG_I2C_SLAVE 0 /* not used */
83 #define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */
84 #define CFG_I2C_RTC_ADDR 0x32
85 #define CFG_I2C_EEPROM_ADDR 0x50
86 #define CFG_I2C_EEPROM_ADDR_LEN 1
87 #define CFG_I2C_EEPROM_ADDR_OVERFLOW
89 /* still about 20 kB free with this defined */
92 #define CONFIG_BOOTDELAY 3
94 #ifdef CONFIG_HARD_I2C
95 #define CONFIG_COMMANDS \
101 ~(CFG_CMD_FPGA | CFG_CMD_MISC) )
103 #define CONFIG_COMMANDS \
106 ~(CFG_CMD_FPGA | CFG_CMD_MISC) )
107 #define CONFIG_TIMESTAMP
111 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
112 #include <cmd_confdefs.h>
114 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
115 #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
117 #define CONFIG_NR_DRAM_BANKS 1
118 #define PHYS_SDRAM 0x20000000
119 #define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
121 #define CFG_MEMTEST_START PHYS_SDRAM
122 #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
124 #define CONFIG_DRIVER_ETHER
125 #define CONFIG_NET_RETRY_COUNT 20
126 #define CONFIG_AT91C_USE_RMII
128 #define CONFIG_HAS_DATAFLASH 1
129 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
130 #define CFG_MAX_DATAFLASH_BANKS 2
131 #define CFG_MAX_DATAFLASH_PAGES 16384
132 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
133 #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
135 #define PHYS_FLASH_1 0x10000000
136 #define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */
137 #define CFG_FLASH_BASE PHYS_FLASH_1
138 #define CFG_MONITOR_BASE CFG_FLASH_BASE
139 #define CFG_MAX_FLASH_BANKS 1
140 #define CFG_MAX_FLASH_SECT 256
141 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
142 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
144 #define CFG_ENV_IS_IN_FLASH 1
145 #define CFG_ENV_OFFSET 0x20000 /* after u-boot.bin */
146 #define CFG_ENV_SECT_SIZE (64 << 10) /* sectors are 64 kB */
147 #define CFG_ENV_SIZE (16 << 10) /* Use only 16 kB */
149 #define CFG_LOAD_ADDR 0x21000000 /* default load address */
151 #define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
153 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
154 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
155 #define CFG_MAXARGS 32 /* max number of command args */
156 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
159 /*-----------------------------------------------------------------------
160 * Board specific extension for bd_info
162 * This structure is embedded in the global bd_info (bd_t) structure
163 * and can be used by the board specific code (eg board/...)
167 /* helper variable for board environment handling
169 * env_crc_valid == 0 => uninitialised
170 * env_crc_valid > 0 => environment crc in flash is valid
171 * env_crc_valid < 0 => environment crc in flash is invalid
175 #endif /* __ASSEMBLY__ */
178 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
179 /* AT91C_TC_TIMER_DIV1_CLOCK */
181 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
183 #ifdef CONFIG_USE_IRQ
184 #error CONFIG_USE_IRQ not supported
187 #endif /* __CONFIG_H */