Merge branch 'master' of git://git.denx.de/u-boot-arm
[platform/kernel/u-boot.git] / include / configs / cm_t35.h
1 /*
2  * (C) Copyright 2011 CompuLab, Ltd.
3  * Mike Rapoport <mike@compulab.co.il>
4  * Igor Grinberg <grinberg@compulab.co.il>
5  *
6  * Based on omap3_beagle.h
7  * (C) Copyright 2006-2008
8  * Texas Instruments.
9  * Richard Woodruff <r-woodruff2@ti.com>
10  * Syed Mohammed Khasim <x0khasim@ti.com>
11  *
12  * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
13  *
14  * See file CREDITS for list of people who contributed to this
15  * project.
16  *
17  * This program is free software; you can redistribute it and/or
18  * modify it under the terms of the GNU General Public License as
19  * published by the Free Software Foundation; either version 2 of
20  * the License, or (at your option) any later version.
21  *
22  * This program is distributed in the hope that it will be useful,
23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
25  * GNU General Public License for more details.
26  *
27  * You should have received a copy of the GNU General Public License
28  * along with this program; if not, write to the Free Software
29  * Foundation, Inc.
30  */
31
32 #ifndef __CONFIG_H
33 #define __CONFIG_H
34
35 /*
36  * High Level Configuration Options
37  */
38 #define CONFIG_OMAP     /* in a TI OMAP core */
39 #define CONFIG_OMAP34XX /* which is a 34XX */
40 #define CONFIG_OMAP_GPIO
41 #define CONFIG_CM_T3X   /* working with CM-T35 and CM-T3730 */
42
43 #define CONFIG_SYS_TEXT_BASE    0x80008000
44
45 #define CONFIG_SDRC     /* The chip has SDRC controller */
46
47 #include <asm/arch/cpu.h>               /* get chip and board defs */
48 #include <asm/arch/omap3.h>
49
50 /*
51  * Display CPU and Board information
52  */
53 #define CONFIG_DISPLAY_CPUINFO
54 #define CONFIG_DISPLAY_BOARDINFO
55
56 /* Clock Defines */
57 #define V_OSCK                  26000000        /* Clock output from T2 */
58 #define V_SCLK                  (V_OSCK >> 1)
59
60 #define CONFIG_MISC_INIT_R
61
62 #define CONFIG_OF_LIBFDT                1
63 /*
64  * The early kernel mapping on ARM currently only maps from the base of DRAM
65  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
66  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
67  * so that leaves DRAM base to DRAM base + 0x4000 available.
68  */
69 #define CONFIG_SYS_BOOTMAPSZ            0x4000
70
71 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
72 #define CONFIG_SETUP_MEMORY_TAGS
73 #define CONFIG_INITRD_TAG
74 #define CONFIG_REVISION_TAG
75 #define CONFIG_SERIAL_TAG
76
77 /*
78  * Size of malloc() pool
79  */
80 #define CONFIG_ENV_SIZE         (16 << 10)      /* 16 KiB */
81                                         /* Sector */
82 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
83
84 /*
85  * Hardware drivers
86  */
87
88 /*
89  * NS16550 Configuration
90  */
91 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
92
93 #define CONFIG_SYS_NS16550
94 #define CONFIG_SYS_NS16550_SERIAL
95 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
96 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
97
98 /*
99  * select serial console configuration
100  */
101 #define CONFIG_CONS_INDEX               3
102 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
103 #define CONFIG_SERIAL3                  3       /* UART3 */
104
105 /* allow to overwrite serial and ethaddr */
106 #define CONFIG_ENV_OVERWRITE
107 #define CONFIG_BAUDRATE                 115200
108 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
109                                         115200}
110
111 #define CONFIG_GENERIC_MMC
112 #define CONFIG_MMC
113 #define CONFIG_OMAP_HSMMC
114 #define CONFIG_DOS_PARTITION
115
116 /* USB */
117 #define CONFIG_USB_OMAP3
118 #define CONFIG_USB_EHCI
119 #define CONFIG_USB_EHCI_OMAP
120 #define CONFIG_USB_ULPI
121 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
122 #define CONFIG_USB_STORAGE
123 #define CONFIG_MUSB_UDC
124 #define CONFIG_TWL4030_USB
125 #define CONFIG_CMD_USB
126
127 /* USB device configuration */
128 #define CONFIG_USB_DEVICE
129 #define CONFIG_USB_TTY
130 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
131
132 /* commands to include */
133 #include <config_cmd_default.h>
134
135 #define CONFIG_CMD_CACHE
136 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
137 #define CONFIG_CMD_FAT          /* FAT support                  */
138 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
139 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
140 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
141 #define MTDIDS_DEFAULT          "nand0=nand"
142 #define MTDPARTS_DEFAULT        "mtdparts=nand:512k(x-loader),"\
143                                 "1920k(u-boot),128k(u-boot-env),"\
144                                 "4m(kernel),-(fs)"
145
146 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
147 #define CONFIG_CMD_MMC          /* MMC support                  */
148 #define CONFIG_CMD_NAND         /* NAND support                 */
149 #define CONFIG_CMD_DHCP
150 #define CONFIG_CMD_PING
151
152 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
153 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
154 #undef CONFIG_CMD_IMLS          /* List all found images        */
155
156 #define CONFIG_SYS_NO_FLASH
157 #define CONFIG_HARD_I2C
158 #define CONFIG_SYS_I2C_SPEED            100000
159 #define CONFIG_SYS_I2C_SLAVE            1
160 #define CONFIG_DRIVER_OMAP34XX_I2C
161 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
162 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
163 #define CONFIG_I2C_MULTI_BUS
164
165 /*
166  * TWL4030
167  */
168 #define CONFIG_TWL4030_POWER
169 #define CONFIG_TWL4030_LED
170
171 /*
172  * Board NAND Info.
173  */
174 #define CONFIG_SYS_NAND_QUIET_TEST
175 #define CONFIG_NAND_OMAP_GPMC
176 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
177                                                         /* to access nand */
178 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
179                                                         /* to access nand at */
180                                                         /* CS0 */
181 #define GPMC_NAND_ECC_LP_x8_LAYOUT
182
183 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
184                                                         /* devices */
185 #define CONFIG_JFFS2_NAND
186 /* nand device jffs2 lives on */
187 #define CONFIG_JFFS2_DEV                "nand0"
188 /* start of jffs2 partition */
189 #define CONFIG_JFFS2_PART_OFFSET        0x680000
190 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
191                                                         /* partition */
192
193 /* Environment information */
194 #define CONFIG_BOOTDELAY                10
195 #define CONFIG_ZERO_BOOTDELAY_CHECK
196
197 #define CONFIG_EXTRA_ENV_SETTINGS \
198         "loadaddr=0x82000000\0" \
199         "usbtty=cdc_acm\0" \
200         "console=ttyS2,115200n8\0" \
201         "mpurate=500\0" \
202         "vram=12M\0" \
203         "dvimode=1024x768MR-16@60\0" \
204         "defaultdisplay=dvi\0" \
205         "mmcdev=0\0" \
206         "mmcroot=/dev/mmcblk0p2 rw\0" \
207         "mmcrootfstype=ext3 rootwait\0" \
208         "nandroot=/dev/mtdblock4 rw\0" \
209         "nandrootfstype=jffs2\0" \
210         "mmcargs=setenv bootargs console=${console} " \
211                 "mpurate=${mpurate} " \
212                 "vram=${vram} " \
213                 "omapfb.mode=dvi:${dvimode} " \
214                 "omapfb.debug=y " \
215                 "omapdss.def_disp=${defaultdisplay} " \
216                 "root=${mmcroot} " \
217                 "rootfstype=${mmcrootfstype}\0" \
218         "nandargs=setenv bootargs console=${console} " \
219                 "mpurate=${mpurate} " \
220                 "vram=${vram} " \
221                 "omapfb.mode=dvi:${dvimode} " \
222                 "omapfb.debug=y " \
223                 "omapdss.def_disp=${defaultdisplay} " \
224                 "root=${nandroot} " \
225                 "rootfstype=${nandrootfstype}\0" \
226         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
227         "bootscript=echo Running bootscript from mmc ...; " \
228                 "source ${loadaddr}\0" \
229         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
230         "mmcboot=echo Booting from mmc ...; " \
231                 "run mmcargs; " \
232                 "bootm ${loadaddr}\0" \
233         "nandboot=echo Booting from nand ...; " \
234                 "run nandargs; " \
235                 "nand read ${loadaddr} 280000 400000; " \
236                 "bootm ${loadaddr}\0" \
237
238 #define CONFIG_BOOTCOMMAND \
239         "mmc dev ${mmcdev}; if mmc rescan; then " \
240                 "if run loadbootscript; then " \
241                         "run bootscript; " \
242                 "else " \
243                         "if run loaduimage; then " \
244                                 "run mmcboot; " \
245                         "else run nandboot; " \
246                         "fi; " \
247                 "fi; " \
248         "else run nandboot; fi"
249
250 /*
251  * Miscellaneous configurable options
252  */
253 #define CONFIG_AUTO_COMPLETE
254 #define CONFIG_CMDLINE_EDITING
255 #define CONFIG_TIMESTAMP
256 #define CONFIG_SYS_AUTOLOAD             "no"
257 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
258 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
259 #define CONFIG_SYS_PROMPT               "CM-T3x # "
260 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
261 /* Print Buffer Size */
262 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
263                                         sizeof(CONFIG_SYS_PROMPT) + 16)
264 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
265 /* Boot Argument Buffer Size */
266 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
267
268 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
269                                                                 /* works on */
270 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
271                                         0x01F00000) /* 31MB */
272
273 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
274                                                         /* load address */
275
276 /*
277  * OMAP3 has 12 GP timers, they can be driven by the system clock
278  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
279  * This rate is divided by a local divisor.
280  */
281 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
282 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
283 #define CONFIG_SYS_HZ                   1000
284
285 /*-----------------------------------------------------------------------
286  * Physical Memory Map
287  */
288 #define CONFIG_NR_DRAM_BANKS    1       /* CS1 is never populated */
289 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
290
291 /*-----------------------------------------------------------------------
292  * FLASH and environment organization
293  */
294
295 /* **** PISMO SUPPORT *** */
296 /* Configure the PISMO */
297 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
298
299 /* Monitor at start of flash */
300 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
301 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
302
303 #define CONFIG_ENV_IS_IN_NAND
304 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
305 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
306 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
307
308 #if defined(CONFIG_CMD_NET)
309 #define CONFIG_SMC911X
310 #define CONFIG_SMC911X_32_BIT
311 #define CM_T3X_SMC911X_BASE     0x2C000000
312 #define SB_T35_SMC911X_BASE     (CM_T3X_SMC911X_BASE + (16 << 20))
313 #define CONFIG_SMC911X_BASE     CM_T3X_SMC911X_BASE
314 #endif /* (CONFIG_CMD_NET) */
315
316 /* additions for new relocation code, must be added to all boards */
317 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
318 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
319 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
320 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR +     \
321                                          CONFIG_SYS_INIT_RAM_SIZE -     \
322                                          GENERATED_GBL_DATA_SIZE)
323
324 /* Status LED */
325 #define CONFIG_STATUS_LED               /* Status LED enabled */
326 #define CONFIG_BOARD_SPECIFIC_LED
327 #define STATUS_LED_GREEN                0
328 #define STATUS_LED_BIT                  STATUS_LED_GREEN
329 #define STATUS_LED_STATE                STATUS_LED_ON
330 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
331 #define STATUS_LED_BOOT                 STATUS_LED_BIT
332 #define GREEN_LED_GPIO                  186 /* CM-T35 Green LED is GPIO186 */
333
334 /* GPIO banks */
335 #ifdef CONFIG_STATUS_LED
336 #define CONFIG_OMAP3_GPIO_6     /* GPIO186 is in GPIO bank 6  */
337 #endif
338
339 #endif /* __CONFIG_H */