include/configs/cm_t35.h

   1 /*
   2  * (C) Copyright 2011 CompuLab, Ltd.
   3  * Mike Rapoport <mike@compulab.co.il>
   4  * Igor Grinberg <grinberg@compulab.co.il>
   5  *
   6  * Based on omap3_beagle.h
   7  * (C) Copyright 2006-2008
   8  * Texas Instruments.
   9  * Richard Woodruff <r-woodruff2@ti.com>
  10  * Syed Mohammed Khasim <x0khasim@ti.com>
  11  *
  12  * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc.
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 /*
  36  * High Level Configuration Options
  37  */
  38 #define CONFIG_OMAP     /* in a TI OMAP core */
  39 #define CONFIG_OMAP34XX /* which is a 34XX */
  40 #define CONFIG_OMAP_GPIO
  41 #define CONFIG_CM_T3X   /* working with CM-T35 and CM-T3730 */
  42
  43 #define CONFIG_SYS_TEXT_BASE    0x80008000
  44
  45 #define CONFIG_SDRC     /* The chip has SDRC controller */
  46
  47 #include <asm/arch/cpu.h>               /* get chip and board defs */
  48 #include <asm/arch/omap3.h>
  49
  50 /*
  51  * Display CPU and Board information
  52  */
  53 #define CONFIG_DISPLAY_CPUINFO
  54 #define CONFIG_DISPLAY_BOARDINFO
  55
  56 /* Clock Defines */
  57 #define V_OSCK                  26000000        /* Clock output from T2 */
  58 #define V_SCLK                  (V_OSCK >> 1)
  59
  60 #define CONFIG_MISC_INIT_R
  61
  62 #define CONFIG_OF_LIBFDT                1
  63 /*
  64  * The early kernel mapping on ARM currently only maps from the base of DRAM
  65  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
  66  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
  67  * so that leaves DRAM base to DRAM base + 0x4000 available.
  68  */
  69 #define CONFIG_SYS_BOOTMAPSZ            0x4000
  70
  71 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  72 #define CONFIG_SETUP_MEMORY_TAGS
  73 #define CONFIG_INITRD_TAG
  74 #define CONFIG_REVISION_TAG
  75 #define CONFIG_SERIAL_TAG
  76
  77 /*
  78  * Size of malloc() pool
  79  */
  80 #define CONFIG_ENV_SIZE         (16 << 10)      /* 16 KiB */
  81                                         /* Sector */
  82 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
  83
  84 /*
  85  * Hardware drivers
  86  */
  87
  88 /*
  89  * NS16550 Configuration
  90  */
  91 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  92
  93 #define CONFIG_SYS_NS16550
  94 #define CONFIG_SYS_NS16550_SERIAL
  95 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  96 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  97
  98 /*
  99  * select serial console configuration
 100  */
 101 #define CONFIG_CONS_INDEX               3
 102 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
 103 #define CONFIG_SERIAL3                  3       /* UART3 */
 104
 105 /* allow to overwrite serial and ethaddr */
 106 #define CONFIG_ENV_OVERWRITE
 107 #define CONFIG_BAUDRATE                 115200
 108 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 109                                         115200}
 110
 111 #define CONFIG_GENERIC_MMC
 112 #define CONFIG_MMC
 113 #define CONFIG_OMAP_HSMMC
 114 #define CONFIG_DOS_PARTITION
 115
 116 /* USB */
 117 #define CONFIG_USB_OMAP3
 118 #define CONFIG_USB_EHCI
 119 #define CONFIG_USB_EHCI_OMAP
 120 #define CONFIG_USB_ULPI
 121 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
 122 #define CONFIG_USB_STORAGE
 123 #define CONFIG_MUSB_UDC
 124 #define CONFIG_TWL4030_USB
 125 #define CONFIG_CMD_USB
 126
 127 /* USB device configuration */
 128 #define CONFIG_USB_DEVICE
 129 #define CONFIG_USB_TTY
 130 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 131
 132 /* commands to include */
 133 #include <config_cmd_default.h>
 134
 135 #define CONFIG_CMD_CACHE
 136 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 137 #define CONFIG_CMD_FAT          /* FAT support                  */
 138 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 139 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 140 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 141 #define MTDIDS_DEFAULT          "nand0=nand"
 142 #define MTDPARTS_DEFAULT        "mtdparts=nand:512k(x-loader),"\
 143                                 "1920k(u-boot),128k(u-boot-env),"\
 144                                 "4m(kernel),-(fs)"
 145
 146 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 147 #define CONFIG_CMD_MMC          /* MMC support                  */
 148 #define CONFIG_CMD_NAND         /* NAND support                 */
 149 #define CONFIG_CMD_DHCP
 150 #define CONFIG_CMD_PING
 151
 152 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 153 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 154 #undef CONFIG_CMD_IMLS          /* List all found images        */
 155
 156 #define CONFIG_SYS_NO_FLASH
 157 #define CONFIG_HARD_I2C
 158 #define CONFIG_SYS_I2C_SPEED            100000
 159 #define CONFIG_SYS_I2C_SLAVE            1
 160 #define CONFIG_SYS_I2C_BUS              0
 161 #define CONFIG_SYS_I2C_BUS_SELECT       1
 162 #define CONFIG_DRIVER_OMAP34XX_I2C
 163 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 164 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 165 #define CONFIG_I2C_MULTI_BUS
 166
 167 /*
 168  * TWL4030
 169  */
 170 #define CONFIG_TWL4030_POWER
 171 #define CONFIG_TWL4030_LED
 172
 173 /*
 174  * Board NAND Info.
 175  */
 176 #define CONFIG_SYS_NAND_QUIET_TEST
 177 #define CONFIG_NAND_OMAP_GPMC
 178 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 179                                                         /* to access nand */
 180 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 181                                                         /* to access nand at */
 182                                                         /* CS0 */
 183 #define GPMC_NAND_ECC_LP_x8_LAYOUT
 184
 185 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 186                                                         /* devices */
 187 #define CONFIG_JFFS2_NAND
 188 /* nand device jffs2 lives on */
 189 #define CONFIG_JFFS2_DEV                "nand0"
 190 /* start of jffs2 partition */
 191 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 192 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 193                                                         /* partition */
 194
 195 /* Environment information */
 196 #define CONFIG_BOOTDELAY                10
 197 #define CONFIG_ZERO_BOOTDELAY_CHECK
 198
 199 #define CONFIG_EXTRA_ENV_SETTINGS \
 200         "loadaddr=0x82000000\0" \
 201         "usbtty=cdc_acm\0" \
 202         "console=ttyS2,115200n8\0" \
 203         "mpurate=500\0" \
 204         "vram=12M\0" \
 205         "dvimode=1024x768MR-16@60\0" \
 206         "defaultdisplay=dvi\0" \
 207         "mmcdev=0\0" \
 208         "mmcroot=/dev/mmcblk0p2 rw\0" \
 209         "mmcrootfstype=ext3 rootwait\0" \
 210         "nandroot=/dev/mtdblock4 rw\0" \
 211         "nandrootfstype=jffs2\0" \
 212         "mmcargs=setenv bootargs console=${console} " \
 213                 "mpurate=${mpurate} " \
 214                 "vram=${vram} " \
 215                 "omapfb.mode=dvi:${dvimode} " \
 216                 "omapfb.debug=y " \
 217                 "omapdss.def_disp=${defaultdisplay} " \
 218                 "root=${mmcroot} " \
 219                 "rootfstype=${mmcrootfstype}\0" \
 220         "nandargs=setenv bootargs console=${console} " \
 221                 "mpurate=${mpurate} " \
 222                 "vram=${vram} " \
 223                 "omapfb.mode=dvi:${dvimode} " \
 224                 "omapfb.debug=y " \
 225                 "omapdss.def_disp=${defaultdisplay} " \
 226                 "root=${nandroot} " \
 227                 "rootfstype=${nandrootfstype}\0" \
 228         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 229         "bootscript=echo Running bootscript from mmc ...; " \
 230                 "source ${loadaddr}\0" \
 231         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 232         "mmcboot=echo Booting from mmc ...; " \
 233                 "run mmcargs; " \
 234                 "bootm ${loadaddr}\0" \
 235         "nandboot=echo Booting from nand ...; " \
 236                 "run nandargs; " \
 237                 "nand read ${loadaddr} 280000 400000; " \
 238                 "bootm ${loadaddr}\0" \
 239
 240 #define CONFIG_BOOTCOMMAND \
 241         "mmc dev ${mmcdev}; if mmc rescan; then " \
 242                 "if run loadbootscript; then " \
 243                         "run bootscript; " \
 244                 "else " \
 245                         "if run loaduimage; then " \
 246                                 "run mmcboot; " \
 247                         "else run nandboot; " \
 248                         "fi; " \
 249                 "fi; " \
 250         "else run nandboot; fi"
 251
 252 /*
 253  * Miscellaneous configurable options
 254  */
 255 #define CONFIG_AUTO_COMPLETE
 256 #define CONFIG_CMDLINE_EDITING
 257 #define CONFIG_TIMESTAMP
 258 #define CONFIG_SYS_AUTOLOAD             "no"
 259 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 260 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 261 #define CONFIG_SYS_PROMPT               "CM-T3x # "
 262 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 263 /* Print Buffer Size */
 264 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 265                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 266 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 267 /* Boot Argument Buffer Size */
 268 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 269
 270 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 271                                                                 /* works on */
 272 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 273                                         0x01F00000) /* 31MB */
 274
 275 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 276                                                         /* load address */
 277
 278 /*
 279  * OMAP3 has 12 GP timers, they can be driven by the system clock
 280  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 281  * This rate is divided by a local divisor.
 282  */
 283 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 284 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 285 #define CONFIG_SYS_HZ                   1000
 286
 287 /*-----------------------------------------------------------------------
 288  * Physical Memory Map
 289  */
 290 #define CONFIG_NR_DRAM_BANKS    1       /* CS1 is never populated */
 291 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 292
 293 /*-----------------------------------------------------------------------
 294  * FLASH and environment organization
 295  */
 296
 297 /* **** PISMO SUPPORT *** */
 298 /* Configure the PISMO */
 299 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 300
 301 /* Monitor at start of flash */
 302 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 303 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 304
 305 #define CONFIG_ENV_IS_IN_NAND
 306 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 307 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 308 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 309
 310 #if defined(CONFIG_CMD_NET)
 311 #define CONFIG_SMC911X
 312 #define CONFIG_SMC911X_32_BIT
 313 #define CM_T3X_SMC911X_BASE     0x2C000000
 314 #define SB_T35_SMC911X_BASE     (CM_T3X_SMC911X_BASE + (16 << 20))
 315 #define CONFIG_SMC911X_BASE     CM_T3X_SMC911X_BASE
 316 #endif /* (CONFIG_CMD_NET) */
 317
 318 /* additions for new relocation code, must be added to all boards */
 319 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 320 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 321 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 322 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR +     \
 323                                          CONFIG_SYS_INIT_RAM_SIZE -     \
 324                                          GENERATED_GBL_DATA_SIZE)
 325
 326 /* Status LED */
 327 #define CONFIG_STATUS_LED               /* Status LED enabled */
 328 #define CONFIG_BOARD_SPECIFIC_LED
 329 #define STATUS_LED_GREEN                0
 330 #define STATUS_LED_BIT                  STATUS_LED_GREEN
 331 #define STATUS_LED_STATE                STATUS_LED_ON
 332 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 333 #define STATUS_LED_BOOT                 STATUS_LED_BIT
 334 #define GREEN_LED_GPIO                  186 /* CM-T35 Green LED is GPIO186 */
 335
 336 /* GPIO banks */
 337 #ifdef CONFIG_STATUS_LED
 338 #define CONFIG_OMAP3_GPIO_6     /* GPIO186 is in GPIO bank 6  */
 339 #endif
 340
 341 #endif /* __CONFIG_H */