Merge git://git.denx.de/u-boot-mpc85xx
[platform/kernel/u-boot.git] / include / configs / cm_t335.h
1 /*
2  * Config file for Compulab CM-T335 board
3  *
4  * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Ilya Ledvich <ilya@compulab.co.il>
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #ifndef __CONFIG_CM_T335_H
12 #define __CONFIG_CM_T335_H
13
14 #define CONFIG_CM_T335
15 #define CONFIG_NAND
16
17 #include <configs/ti_am335x_common.h>
18
19 #undef CONFIG_BOARD_LATE_INIT
20 #undef CONFIG_SPI
21 #undef CONFIG_OMAP3_SPI
22 #undef CONFIG_BOOTCOUNT_LIMIT
23 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
24
25 #undef CONFIG_MAX_RAM_BANK_SIZE
26 #define CONFIG_MAX_RAM_BANK_SIZE        (512 << 20)     /* 512MB */
27
28 #define MACH_TYPE_CM_T335               4586    /* Until the next sync */
29 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T335
30
31 /* Clock Defines */
32 #define V_OSCK                          25000000  /* Clock output from T2 */
33 #define V_SCLK                          (V_OSCK)
34
35 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KiB */
36
37 #ifndef CONFIG_SPL_BUILD
38 #define MMCARGS \
39         "mmcdev=0\0" \
40         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
41         "mmcrootfstype=ext4\0" \
42         "mmcargs=setenv bootargs console=${console} " \
43                 "root=${mmcroot} " \
44                 "rootfstype=${mmcrootfstype}\0" \
45         "mmcboot=echo Booting from mmc ...; " \
46                 "run mmcargs; " \
47                 "bootm ${loadaddr}\0"
48
49 #define NANDARGS \
50         "mtdids=" MTDIDS_DEFAULT "\0" \
51         "mtdparts=" MTDPARTS_DEFAULT "\0" \
52         "nandroot=ubi0:rootfs rw\0" \
53         "nandrootfstype=ubifs\0" \
54         "nandargs=setenv bootargs console=${console} " \
55                 "root=${nandroot} " \
56                 "rootfstype=${nandrootfstype} " \
57                 "ubi.mtd=${rootfs_name}\0" \
58         "nandboot=echo Booting from nand ...; " \
59                 "run nandargs; " \
60                 "nboot ${loadaddr} nand0 900000; " \
61                 "bootm ${loadaddr}\0"
62
63 #define CONFIG_EXTRA_ENV_SETTINGS \
64         "loadaddr=82000000\0" \
65         "console=ttyO0,115200n8\0" \
66         "rootfs_name=rootfs\0" \
67         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
68         "bootscript=echo Running bootscript from mmc ...; " \
69                 "source ${loadaddr}\0" \
70         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
71         MMCARGS \
72         NANDARGS
73
74 #define CONFIG_BOOTCOMMAND \
75         "mmc dev ${mmcdev}; if mmc rescan; then " \
76                 "if run loadbootscript; then " \
77                         "run bootscript; " \
78                 "else " \
79                         "if run loaduimage; then " \
80                                 "run mmcboot; " \
81                         "else run nandboot; " \
82                         "fi; " \
83                 "fi; " \
84         "else run nandboot; fi"
85 #endif /* CONFIG_SPL_BUILD */
86
87 #define CONFIG_TIMESTAMP
88 #define CONFIG_SYS_AUTOLOAD             "no"
89
90 /* Serial console configuration */
91 #define CONFIG_CONS_INDEX               1
92 #define CONFIG_SERIAL1                  1       /* UART0 */
93
94 /* NS16550 Configuration */
95 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
96 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
97 #define CONFIG_BAUDRATE                 115200
98
99 /* I2C Configuration */
100 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50    /* Main EEPROM */
101 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
102 #define CONFIG_SYS_I2C_EEPROM_BUS       0
103
104 /* SPL */
105 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/am33xx/u-boot-spl.lds"
106
107 /* Network. */
108 #define CONFIG_PHY_GIGE
109 #define CONFIG_PHYLIB
110 #define CONFIG_PHY_ATHEROS
111
112 /* NAND support */
113 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
114 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
115                                          CONFIG_SYS_NAND_PAGE_SIZE)
116 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
117 #define CONFIG_SYS_NAND_OOBSIZE         64
118 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
119 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
120 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
121                                          10, 11, 12, 13, 14, 15, 16, 17, \
122                                          18, 19, 20, 21, 22, 23, 24, 25, \
123                                          26, 27, 28, 29, 30, 31, 32, 33, \
124                                          34, 35, 36, 37, 38, 39, 40, 41, \
125                                          42, 43, 44, 45, 46, 47, 48, 49, \
126                                          50, 51, 52, 53, 54, 55, 56, 57, }
127
128 #define CONFIG_SYS_NAND_ECCSIZE         512
129 #define CONFIG_SYS_NAND_ECCBYTES        14
130
131 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
132
133 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
134 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
135
136 #define CONFIG_CMD_NAND
137 #define MTDIDS_DEFAULT                  "nand0=nand"
138 #define MTDPARTS_DEFAULT                "mtdparts=nand:2m(spl)," \
139                                         "1m(u-boot),1m(u-boot-env)," \
140                                         "1m(dtb),4m(splash)," \
141                                         "6m(kernel),-(rootfs)"
142 #define CONFIG_ENV_IS_IN_NAND
143 #define CONFIG_ENV_OFFSET               0x300000 /* environment starts here */
144 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
145 #define CONFIG_SYS_NAND_ONFI_DETECTION
146 #ifdef CONFIG_SPL_OS_BOOT
147 #define CONFIG_CMD_SPL_NAND_OFS         0x400000 /* un-assigned: (using dtb) */
148 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
149 #define CONFIG_CMD_SPL_WRITE_SIZE       0x2000
150 #endif
151
152 /* GPIO pin + bank to pin ID mapping */
153 #define GPIO_PIN(_bank, _pin)           ((_bank << 5) + _pin)
154
155 /* Status LED */
156 #define CONFIG_STATUS_LED
157 #define CONFIG_GPIO_LED
158 #define CONFIG_BOARD_SPECIFIC_LED
159 #define STATUS_LED_BIT                  GPIO_PIN(2, 0)
160 /* Status LED polarity is inversed, so init it in the "off" state */
161 #define STATUS_LED_STATE                STATUS_LED_OFF
162 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
163 #define STATUS_LED_BOOT                 0
164
165 /* EEPROM */
166 #define CONFIG_CMD_EEPROM
167 #define CONFIG_ENV_EEPROM_IS_ON_I2C
168 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
169 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
170 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
171 #define CONFIG_SYS_EEPROM_SIZE                  256
172
173 #define CONFIG_CMD_EEPROM_LAYOUT
174 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3"
175
176 #ifndef CONFIG_SPL_BUILD
177 /*
178  * Enable PCA9555 at I2C0-0x26.
179  * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
180  */
181 #define CONFIG_PCA953X
182 #define CONFIG_CMD_PCA953X
183 #define CONFIG_CMD_PCA953X_INFO
184 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x26
185 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x26, 16} }
186 #endif /* CONFIG_SPL_BUILD */
187
188 #endif  /* __CONFIG_CM_T335_H */
189