include/configs/cm_t335.h

   1 /*
   2  * Config file for Compulab CM-T335 board
   3  *
   4  * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
   5  *
   6  * Author: Ilya Ledvich <ilya@compulab.co.il>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_CM_T335_H
  12 #define __CONFIG_CM_T335_H
  13
  14 #define CONFIG_CM_T335
  15
  16 #include <configs/ti_am335x_common.h>
  17
  18 #undef CONFIG_SPI
  19 #undef CONFIG_OMAP3_SPI
  20 #undef CONFIG_BOOTCOUNT_LIMIT
  21 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
  22
  23 #undef CONFIG_MAX_RAM_BANK_SIZE
  24 #define CONFIG_MAX_RAM_BANK_SIZE        (512 << 20)     /* 512MB */
  25
  26 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T335
  27
  28 /* Clock Defines */
  29 #define V_OSCK                          25000000  /* Clock output from T2 */
  30 #define V_SCLK                          (V_OSCK)
  31
  32 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KiB */
  33
  34 #ifndef CONFIG_SPL_BUILD
  35 #define MMCARGS \
  36         "mmcdev=0\0" \
  37         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
  38         "mmcrootfstype=ext4\0" \
  39         "mmcargs=setenv bootargs console=${console} " \
  40                 "root=${mmcroot} " \
  41                 "rootfstype=${mmcrootfstype}\0" \
  42         "mmcboot=echo Booting from mmc ...; " \
  43                 "run mmcargs; " \
  44                 "bootm ${loadaddr}\0"
  45
  46 #define NANDARGS \
  47         "mtdids=" MTDIDS_DEFAULT "\0" \
  48         "mtdparts=" MTDPARTS_DEFAULT "\0" \
  49         "nandroot=ubi0:rootfs rw\0" \
  50         "nandrootfstype=ubifs\0" \
  51         "nandargs=setenv bootargs console=${console} " \
  52                 "root=${nandroot} " \
  53                 "rootfstype=${nandrootfstype} " \
  54                 "ubi.mtd=${rootfs_name}\0" \
  55         "nandboot=echo Booting from nand ...; " \
  56                 "run nandargs; " \
  57                 "nboot ${loadaddr} nand0 900000; " \
  58                 "bootm ${loadaddr}\0"
  59
  60 #define CONFIG_EXTRA_ENV_SETTINGS \
  61         "loadaddr=82000000\0" \
  62         "console=ttyO0,115200n8\0" \
  63         "rootfs_name=rootfs\0" \
  64         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  65         "bootscript=echo Running bootscript from mmc ...; " \
  66                 "source ${loadaddr}\0" \
  67         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  68         MMCARGS \
  69         NANDARGS
  70
  71 #define CONFIG_BOOTCOMMAND \
  72         "mmc dev ${mmcdev}; if mmc rescan; then " \
  73                 "if run loadbootscript; then " \
  74                         "run bootscript; " \
  75                 "else " \
  76                         "if run loaduimage; then " \
  77                                 "run mmcboot; " \
  78                         "else run nandboot; " \
  79                         "fi; " \
  80                 "fi; " \
  81         "else run nandboot; fi"
  82 #endif /* CONFIG_SPL_BUILD */
  83
  84 #define CONFIG_TIMESTAMP
  85 #define CONFIG_SYS_AUTOLOAD             "no"
  86
  87 /* Serial console configuration */
  88 #define CONFIG_CONS_INDEX               1
  89 #define CONFIG_SERIAL1                  1       /* UART0 */
  90
  91 /* NS16550 Configuration */
  92 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
  93 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
  94
  95 /* I2C Configuration */
  96 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50    /* Main EEPROM */
  97 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
  98 #define CONFIG_SYS_I2C_EEPROM_BUS       0
  99
 100 /* SPL */
 101 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 102
 103 /* Network. */
 104 #define CONFIG_PHY_ATHEROS
 105
 106 /* NAND support */
 107 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 108 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 109                                          CONFIG_SYS_NAND_PAGE_SIZE)
 110 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 111 #define CONFIG_SYS_NAND_OOBSIZE         64
 112 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 113 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 114 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
 115                                          10, 11, 12, 13, 14, 15, 16, 17, \
 116                                          18, 19, 20, 21, 22, 23, 24, 25, \
 117                                          26, 27, 28, 29, 30, 31, 32, 33, \
 118                                          34, 35, 36, 37, 38, 39, 40, 41, \
 119                                          42, 43, 44, 45, 46, 47, 48, 49, \
 120                                          50, 51, 52, 53, 54, 55, 56, 57, }
 121
 122 #define CONFIG_SYS_NAND_ECCSIZE         512
 123 #define CONFIG_SYS_NAND_ECCBYTES        14
 124
 125 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 126
 127 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
 128 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
 129
 130 #define MTDIDS_DEFAULT                  "nand0=nand"
 131 #define MTDPARTS_DEFAULT                "mtdparts=nand:2m(spl)," \
 132                                         "1m(u-boot),1m(u-boot-env)," \
 133                                         "1m(dtb),4m(splash)," \
 134                                         "6m(kernel),-(rootfs)"
 135 #define CONFIG_ENV_OFFSET               0x300000 /* environment starts here */
 136 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 137 #define CONFIG_SYS_NAND_ONFI_DETECTION
 138 #ifdef CONFIG_SPL_OS_BOOT
 139 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
 140 #endif
 141
 142 /* GPIO pin + bank to pin ID mapping */
 143 #define GPIO_PIN(_bank, _pin)           ((_bank << 5) + _pin)
 144
 145 /* Status LED */
 146 /* Status LED polarity is inversed, so init it in the "off" state */
 147
 148 /* EEPROM */
 149 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 150 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 151 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 152 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 153 #define CONFIG_SYS_EEPROM_SIZE                  256
 154
 155 #ifndef CONFIG_SPL_BUILD
 156 /*
 157  * Enable PCA9555 at I2C0-0x26.
 158  * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
 159  */
 160 #define CONFIG_PCA953X
 161 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x26
 162 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x26, 16} }
 163 #endif /* CONFIG_SPL_BUILD */
 164
 165 #endif  /* __CONFIG_CM_T335_H */
 166