Merge git://git.denx.de/u-boot-fsl-qoriq
[platform/kernel/u-boot.git] / include / configs / cm_t335.h
1 /*
2  * Config file for Compulab CM-T335 board
3  *
4  * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Ilya Ledvich <ilya@compulab.co.il>
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #ifndef __CONFIG_CM_T335_H
12 #define __CONFIG_CM_T335_H
13
14 #define CONFIG_CM_T335
15 #define CONFIG_NAND
16
17 #include <configs/ti_am335x_common.h>
18
19 #undef CONFIG_SPI
20 #undef CONFIG_OMAP3_SPI
21 #undef CONFIG_BOOTCOUNT_LIMIT
22 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
23
24 #undef CONFIG_MAX_RAM_BANK_SIZE
25 #define CONFIG_MAX_RAM_BANK_SIZE        (512 << 20)     /* 512MB */
26
27 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T335
28
29 /* Clock Defines */
30 #define V_OSCK                          25000000  /* Clock output from T2 */
31 #define V_SCLK                          (V_OSCK)
32
33 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KiB */
34
35 #ifndef CONFIG_SPL_BUILD
36 #define MMCARGS \
37         "mmcdev=0\0" \
38         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
39         "mmcrootfstype=ext4\0" \
40         "mmcargs=setenv bootargs console=${console} " \
41                 "root=${mmcroot} " \
42                 "rootfstype=${mmcrootfstype}\0" \
43         "mmcboot=echo Booting from mmc ...; " \
44                 "run mmcargs; " \
45                 "bootm ${loadaddr}\0"
46
47 #define NANDARGS \
48         "mtdids=" MTDIDS_DEFAULT "\0" \
49         "mtdparts=" MTDPARTS_DEFAULT "\0" \
50         "nandroot=ubi0:rootfs rw\0" \
51         "nandrootfstype=ubifs\0" \
52         "nandargs=setenv bootargs console=${console} " \
53                 "root=${nandroot} " \
54                 "rootfstype=${nandrootfstype} " \
55                 "ubi.mtd=${rootfs_name}\0" \
56         "nandboot=echo Booting from nand ...; " \
57                 "run nandargs; " \
58                 "nboot ${loadaddr} nand0 900000; " \
59                 "bootm ${loadaddr}\0"
60
61 #define CONFIG_EXTRA_ENV_SETTINGS \
62         "loadaddr=82000000\0" \
63         "console=ttyO0,115200n8\0" \
64         "rootfs_name=rootfs\0" \
65         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
66         "bootscript=echo Running bootscript from mmc ...; " \
67                 "source ${loadaddr}\0" \
68         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
69         MMCARGS \
70         NANDARGS
71
72 #define CONFIG_BOOTCOMMAND \
73         "mmc dev ${mmcdev}; if mmc rescan; then " \
74                 "if run loadbootscript; then " \
75                         "run bootscript; " \
76                 "else " \
77                         "if run loaduimage; then " \
78                                 "run mmcboot; " \
79                         "else run nandboot; " \
80                         "fi; " \
81                 "fi; " \
82         "else run nandboot; fi"
83 #endif /* CONFIG_SPL_BUILD */
84
85 #define CONFIG_TIMESTAMP
86 #define CONFIG_SYS_AUTOLOAD             "no"
87
88 /* Serial console configuration */
89 #define CONFIG_CONS_INDEX               1
90 #define CONFIG_SERIAL1                  1       /* UART0 */
91
92 /* NS16550 Configuration */
93 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
94 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
95
96 /* I2C Configuration */
97 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50    /* Main EEPROM */
98 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
99 #define CONFIG_SYS_I2C_EEPROM_BUS       0
100
101 /* SPL */
102 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
103
104 /* Network. */
105 #define CONFIG_PHY_GIGE
106 #define CONFIG_PHYLIB
107 #define CONFIG_PHY_ATHEROS
108
109 /* NAND support */
110 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
111 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
112                                          CONFIG_SYS_NAND_PAGE_SIZE)
113 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
114 #define CONFIG_SYS_NAND_OOBSIZE         64
115 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
116 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
117 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
118                                          10, 11, 12, 13, 14, 15, 16, 17, \
119                                          18, 19, 20, 21, 22, 23, 24, 25, \
120                                          26, 27, 28, 29, 30, 31, 32, 33, \
121                                          34, 35, 36, 37, 38, 39, 40, 41, \
122                                          42, 43, 44, 45, 46, 47, 48, 49, \
123                                          50, 51, 52, 53, 54, 55, 56, 57, }
124
125 #define CONFIG_SYS_NAND_ECCSIZE         512
126 #define CONFIG_SYS_NAND_ECCBYTES        14
127
128 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
129
130 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
131 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
132
133 #define CONFIG_CMD_NAND
134 #define MTDIDS_DEFAULT                  "nand0=nand"
135 #define MTDPARTS_DEFAULT                "mtdparts=nand:2m(spl)," \
136                                         "1m(u-boot),1m(u-boot-env)," \
137                                         "1m(dtb),4m(splash)," \
138                                         "6m(kernel),-(rootfs)"
139 #define CONFIG_ENV_IS_IN_NAND
140 #define CONFIG_ENV_OFFSET               0x300000 /* environment starts here */
141 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
142 #define CONFIG_SYS_NAND_ONFI_DETECTION
143 #ifdef CONFIG_SPL_OS_BOOT
144 #define CONFIG_CMD_SPL_NAND_OFS         0x400000 /* un-assigned: (using dtb) */
145 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
146 #define CONFIG_CMD_SPL_WRITE_SIZE       0x2000
147 #endif
148
149 /* GPIO pin + bank to pin ID mapping */
150 #define GPIO_PIN(_bank, _pin)           ((_bank << 5) + _pin)
151
152 /* Status LED */
153 /* Status LED polarity is inversed, so init it in the "off" state */
154
155 /* EEPROM */
156 #define CONFIG_ENV_EEPROM_IS_ON_I2C
157 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
158 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
159 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
160 #define CONFIG_SYS_EEPROM_SIZE                  256
161
162 #ifndef CONFIG_SPL_BUILD
163 /*
164  * Enable PCA9555 at I2C0-0x26.
165  * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
166  */
167 #define CONFIG_PCA953X
168 #define CONFIG_CMD_PCA953X
169 #define CONFIG_CMD_PCA953X_INFO
170 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x26
171 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x26, 16} }
172 #endif /* CONFIG_SPL_BUILD */
173
174 #endif  /* __CONFIG_CM_T335_H */
175