2 * Config file for Compulab CM-FX6 board
4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6 * Author: Nikita Kiryanov <nikita@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
14 #include <asm/arch/imx-regs.h>
15 #include <config_distro_defaults.h>
16 #include "mx6_common.h"
20 #define CONFIG_SYS_LITTLE_ENDIAN
21 #define CONFIG_MACH_TYPE 4273
22 #define CONFIG_SYS_HZ 1000
24 /* Display information on boot */
25 #define CONFIG_DISPLAY_CPUINFO
26 #define CONFIG_DISPLAY_BOARDINFO
27 #define CONFIG_TIMESTAMP
30 #include <config_cmd_default.h>
31 #define CONFIG_CMD_GREPENV
32 #undef CONFIG_CMD_FLASH
33 #undef CONFIG_CMD_LOADB
34 #undef CONFIG_CMD_LOADS
35 #undef CONFIG_CMD_XIMG
36 #undef CONFIG_CMD_FPGA
37 #undef CONFIG_CMD_IMLS
41 #define CONFIG_CMD_MMC
42 #define CONFIG_GENERIC_MMC
43 #define CONFIG_FSL_ESDHC
44 #define CONFIG_FSL_USDHC
45 #define CONFIG_SYS_FSL_USDHC_NUM 3
46 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
49 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
50 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
51 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
52 #define CONFIG_NR_DRAM_BANKS 2
53 #define CONFIG_SYS_MEMTEST_START 0x10000000
54 #define CONFIG_SYS_MEMTEST_END 0x10010000
55 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
56 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
57 #define CONFIG_SYS_INIT_SP_OFFSET \
58 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
59 #define CONFIG_SYS_INIT_SP_ADDR \
60 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
63 #define CONFIG_MXC_UART
64 #define CONFIG_MXC_UART_BASE UART4_BASE
65 #define CONFIG_BAUDRATE 115200
66 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
69 #define CONFIG_SYS_PROMPT "CM-FX6 # "
70 #define CONFIG_SYS_CBSIZE 1024
71 #define CONFIG_SYS_MAXARGS 16
72 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
73 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
74 sizeof(CONFIG_SYS_PROMPT) + 16)
77 #define CONFIG_SYS_NO_FLASH
79 #define CONFIG_SF_DEFAULT_BUS 0
80 #define CONFIG_SF_DEFAULT_CS 0
81 #define CONFIG_SF_DEFAULT_SPEED 25000000
82 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
85 #define CONFIG_ENV_OVERWRITE
86 #define CONFIG_ENV_IS_IN_SPI_FLASH
87 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
88 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
89 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
90 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
91 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
92 #define CONFIG_ENV_SIZE (8 * 1024)
93 #define CONFIG_ENV_OFFSET (768 * 1024)
95 #define CONFIG_EXTRA_ENV_SETTINGS \
96 "kernel=uImage-cm-fx6\0" \
98 "loadaddr=0x10800000\0" \
99 "fdtaddr=0x11000000\0" \
100 "console=ttymxc3,115200\0" \
102 "bootscr=boot.scr\0" \
103 "bootm_low=18000000\0" \
104 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
105 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
106 "fdtfile=cm-fx6.dtb\0" \
107 "doboot=bootm ${loadaddr}\0" \
109 "setboottypez=setenv kernel zImage-cm-fx6;" \
110 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
111 "setenv loadfdt true;\0" \
112 "setboottypem=setenv kernel uImage-cm-fx6;" \
113 "setenv doboot bootm ${loadaddr};" \
114 "setenv loadfdt false;\0"\
115 "run_eboot=echo Starting EBOOT ...; "\
116 "mmc dev ${mmcdev} && " \
117 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
119 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
120 "loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
121 "mmcbootscript=echo Running bootscript from mmc ...; "\
122 "source ${loadaddr}\0" \
123 "mmcargs=setenv bootargs console=${console} " \
126 "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
127 "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
128 "mmcboot=echo Booting from mmc ...; " \
131 "nandroot=/dev/mtdblock4 rw\0" \
132 "nandrootfstype=ubifs\0" \
133 "nandargs=setenv bootargs console=${console} " \
134 "root=${nandroot} " \
135 "rootfstype=${nandrootfstype} " \
137 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
138 "nandboot=echo Booting from nand ...; " \
140 "nand read ${loadaddr} 0 780000; " \
141 "if ${loadfdt}; then " \
145 "boot=mmc dev ${mmcdev}; " \
146 "if mmc rescan; then " \
147 "if run loadmmcbootscript; then " \
148 "run mmcbootscript;" \
150 "if run mmcloadkernel; then " \
151 "if ${loadfdt}; then " \
160 #define CONFIG_BOOTCOMMAND \
161 "run setboottypem; run boot"
165 #define CONFIG_MXC_SPI
166 #define CONFIG_SPI_FLASH
167 #define CONFIG_SPI_FLASH_ATMEL
168 #define CONFIG_SPI_FLASH_EON
169 #define CONFIG_SPI_FLASH_GIGADEVICE
170 #define CONFIG_SPI_FLASH_MACRONIX
171 #define CONFIG_SPI_FLASH_SPANSION
172 #define CONFIG_SPI_FLASH_STMICRO
173 #define CONFIG_SPI_FLASH_SST
174 #define CONFIG_SPI_FLASH_WINBOND
177 #ifndef CONFIG_SPL_BUILD
178 #define CONFIG_CMD_NAND
179 #define CONFIG_SYS_NAND_BASE 0x40000000
180 #define CONFIG_SYS_NAND_MAX_CHIPS 1
181 #define CONFIG_SYS_MAX_NAND_DEVICE 1
182 #define CONFIG_NAND_MXS
183 #define CONFIG_SYS_NAND_ONFI_DETECTION
184 /* APBH DMA is required for NAND support */
185 #define CONFIG_APBH_DMA
186 #define CONFIG_APBH_DMA_BURST
187 #define CONFIG_APBH_DMA_BURST8
191 #define CONFIG_FEC_MXC
192 #define CONFIG_FEC_MXC_PHYADDR 0
193 #define CONFIG_FEC_XCV_TYPE RGMII
194 #define IMX_FEC_BASE ENET_BASE_ADDR
195 #define CONFIG_PHYLIB
196 #define CONFIG_PHY_ATHEROS
198 #define CONFIG_ETHPRIME "FEC0"
199 #define CONFIG_ARP_TIMEOUT 200UL
200 #define CONFIG_NETMASK 255.255.255.0
201 #define CONFIG_NET_RETRY_COUNT 5
204 #define CONFIG_CMD_USB
205 #define CONFIG_USB_EHCI
206 #define CONFIG_USB_EHCI_MX6
207 #define CONFIG_USB_STORAGE
208 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
209 #define CONFIG_MXC_USB_FLAGS 0
210 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
211 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
214 #define CONFIG_CMD_I2C
215 #define CONFIG_SYS_I2C
216 #define CONFIG_SYS_I2C_MXC
217 #define CONFIG_SYS_I2C_SPEED 100000
218 #define CONFIG_SYS_MXC_I2C3_SPEED 400000
220 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
221 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
222 #define CONFIG_SYS_I2C_EEPROM_BUS 2
225 #define CONFIG_MXC_GPIO
228 #define CONFIG_ZERO_BOOTDELAY_CHECK
229 #define CONFIG_LOADADDR 0x10800000
230 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
231 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
232 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
233 #define CONFIG_SETUP_MEMORY_TAGS
234 #define CONFIG_INITRD_TAG
237 #define CONFIG_SYS_GENERIC_BOARD
238 #define CONFIG_STACKSIZE (128 * 1024)
239 #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
240 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
241 #define CONFIG_OF_BOARD_SETUP
244 #include "imx6_spl.h"
245 #define CONFIG_SPL_BOARD_INIT
246 #define CONFIG_SPL_MMC_SUPPORT
247 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
248 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
249 #define CONFIG_SPL_SPI_SUPPORT
250 #define CONFIG_SPL_SPI_FLASH_SUPPORT
251 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
252 #define CONFIG_SPL_SPI_LOAD
254 #endif /* __CONFIG_CM_FX6_H */