2 * Config file for Compulab CM-FX6 board
4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6 * Author: Nikita Kiryanov <nikita@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
14 #include "mx6_common.h"
18 #define CONFIG_SYS_LITTLE_ENDIAN
19 #define CONFIG_MACH_TYPE 4273
21 #ifndef CONFIG_SPL_BUILD
22 #define CONFIG_CMD_GPIO
25 /* Display information on boot */
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
28 #define CONFIG_TIMESTAMP
31 #define CONFIG_CMD_GREPENV
32 #undef CONFIG_CMD_LOADB
33 #undef CONFIG_CMD_LOADS
34 #undef CONFIG_CMD_XIMG
35 #undef CONFIG_CMD_FPGA
39 #define CONFIG_CMD_MMC
40 #define CONFIG_GENERIC_MMC
41 #define CONFIG_FSL_ESDHC
42 #define CONFIG_FSL_USDHC
43 #define CONFIG_SYS_FSL_USDHC_NUM 3
44 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
47 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
48 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
49 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
50 #define CONFIG_NR_DRAM_BANKS 2
51 #define CONFIG_SYS_MEMTEST_START 0x10000000
52 #define CONFIG_SYS_MEMTEST_END 0x10010000
53 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
54 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
55 #define CONFIG_SYS_INIT_SP_OFFSET \
56 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
57 #define CONFIG_SYS_INIT_SP_ADDR \
58 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE UART4_BASE
63 #define CONFIG_BAUDRATE 115200
64 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
67 #define CONFIG_SYS_PROMPT "CM-FX6 # "
68 #define CONFIG_SYS_CBSIZE 1024
69 #define CONFIG_SYS_MAXARGS 16
70 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
71 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
72 sizeof(CONFIG_SYS_PROMPT) + 16)
76 #define CONFIG_SF_DEFAULT_BUS 0
77 #define CONFIG_SF_DEFAULT_CS 0
78 #define CONFIG_SF_DEFAULT_SPEED 25000000
79 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
82 #define CONFIG_ENV_OVERWRITE
83 #define CONFIG_ENV_IS_IN_SPI_FLASH
84 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
85 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
86 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
87 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
88 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
89 #define CONFIG_ENV_SIZE (8 * 1024)
90 #define CONFIG_ENV_OFFSET (768 * 1024)
92 #define CONFIG_EXTRA_ENV_SETTINGS \
93 "stdin=serial,usbkbd\0" \
94 "stdout=serial,vga\0" \
95 "stderr=serial,vga\0" \
98 "kernel=uImage-cm-fx6\0" \
101 "bootm_low=18000000\0" \
102 "loadaddr=0x10800000\0" \
103 "fdtaddr=0x11000000\0" \
104 "console=ttymxc3,115200\0" \
106 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
107 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
108 "doboot=bootm ${loadaddr}\0" \
109 "doloadfdt=false\0" \
110 "setboottypez=setenv kernel zImage-cm-fx6;" \
111 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
112 "setenv doloadfdt true;\0" \
113 "setboottypem=setenv kernel uImage-cm-fx6;" \
114 "setenv doboot bootm ${loadaddr};" \
115 "setenv doloadfdt false;\0"\
116 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
117 "sataroot=/dev/sda2 rw rootwait\0" \
118 "nandroot=/dev/mtdblock4 rw\0" \
119 "nandrootfstype=ubifs\0" \
120 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
122 "sataargs=setenv bootargs console=${console} root=${sataroot} " \
124 "nandargs=setenv bootargs console=${console} " \
125 "root=${nandroot} " \
126 "rootfstype=${nandrootfstype} " \
128 "nandboot=if run nandloadkernel; then " \
130 "run setboottypem;" \
131 "run storagebootcmd;" \
132 "run setboottypez;" \
133 "run storagebootcmd;" \
135 "run_eboot=echo Starting EBOOT ...; "\
137 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
138 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
139 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
140 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
141 "bootscript=echo Running bootscript from ${storagetype} ...;" \
142 "source ${loadaddr};\0" \
143 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
144 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
145 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
146 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
147 "setupnandboot=setenv storagetype nand;\0" \
148 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
149 "storagebootcmd=echo Booting from ${storagetype} ...;" \
150 "run ${storagetype}args; run doboot;\0" \
151 "trybootk=if run loadkernel; then " \
152 "if ${doloadfdt}; then " \
155 "run storagebootcmd;" \
157 "trybootsmz=if run loadscript; then " \
160 "run setboottypem;" \
162 "run setboottypez;" \
165 #define CONFIG_BOOTCOMMAND \
166 "run setupmmcboot;" \
167 "mmc dev ${storagedev};" \
168 "if mmc rescan; then " \
171 "run setupusbboot;" \
172 "if usb start; then "\
173 "if run loadscript; then " \
177 "run setupsataboot;" \
178 "if sata init; then " \
181 "run setupnandboot;" \
184 #define CONFIG_PREBOOT "usb start"
188 #define CONFIG_MXC_SPI
189 #define CONFIG_SPI_FLASH
190 #define CONFIG_SPI_FLASH_ATMEL
191 #define CONFIG_SPI_FLASH_EON
192 #define CONFIG_SPI_FLASH_GIGADEVICE
193 #define CONFIG_SPI_FLASH_MACRONIX
194 #define CONFIG_SPI_FLASH_SPANSION
195 #define CONFIG_SPI_FLASH_STMICRO
196 #define CONFIG_SPI_FLASH_SST
197 #define CONFIG_SPI_FLASH_WINBOND
200 #ifndef CONFIG_SPL_BUILD
201 #define CONFIG_CMD_NAND
202 #define CONFIG_SYS_NAND_BASE 0x40000000
203 #define CONFIG_SYS_NAND_MAX_CHIPS 1
204 #define CONFIG_SYS_MAX_NAND_DEVICE 1
205 #define CONFIG_NAND_MXS
206 #define CONFIG_SYS_NAND_ONFI_DETECTION
207 /* APBH DMA is required for NAND support */
208 #define CONFIG_APBH_DMA
209 #define CONFIG_APBH_DMA_BURST
210 #define CONFIG_APBH_DMA_BURST8
214 #define CONFIG_FEC_MXC
215 #define CONFIG_FEC_MXC_PHYADDR 0
216 #define CONFIG_FEC_XCV_TYPE RGMII
217 #define IMX_FEC_BASE ENET_BASE_ADDR
218 #define CONFIG_PHYLIB
219 #define CONFIG_PHY_ATHEROS
221 #define CONFIG_ETHPRIME "FEC0"
222 #define CONFIG_ARP_TIMEOUT 200UL
223 #define CONFIG_NET_RETRY_COUNT 5
226 #define CONFIG_CMD_USB
227 #define CONFIG_USB_EHCI
228 #define CONFIG_USB_EHCI_MX6
229 #define CONFIG_USB_STORAGE
230 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
231 #define CONFIG_MXC_USB_FLAGS 0
232 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
233 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
234 #define CONFIG_USB_KEYBOARD
235 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
236 #define CONFIG_SYS_STDIO_DEREGISTER
239 #define CONFIG_CMD_I2C
240 #define CONFIG_SYS_I2C
241 #define CONFIG_SYS_I2C_MXC
242 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
243 #define CONFIG_SYS_I2C_SPEED 100000
244 #define CONFIG_SYS_MXC_I2C3_SPEED 400000
246 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
247 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
248 #define CONFIG_SYS_I2C_EEPROM_BUS 2
251 #define CONFIG_CMD_SATA
252 #define CONFIG_SYS_SATA_MAX_DEVICE 1
253 #define CONFIG_LIBATA
255 #define CONFIG_DWC_AHSATA
256 #define CONFIG_DWC_AHSATA_PORT_ID 0
257 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
260 #define CONFIG_MXC_GPIO
263 #define CONFIG_ZERO_BOOTDELAY_CHECK
264 #define CONFIG_LOADADDR 0x10800000
265 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
266 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
267 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
268 #define CONFIG_SETUP_MEMORY_TAGS
269 #define CONFIG_INITRD_TAG
270 #define CONFIG_REVISION_TAG
271 #define CONFIG_SERIAL_TAG
274 #define CONFIG_SYS_GENERIC_BOARD
275 #define CONFIG_STACKSIZE (128 * 1024)
276 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
277 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
278 #define CONFIG_OF_BOARD_SETUP
281 #include "imx6_spl.h"
282 #define CONFIG_SPL_BOARD_INIT
283 #define CONFIG_SPL_MMC_SUPPORT
284 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
285 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
286 #define CONFIG_SPL_SPI_SUPPORT
287 #define CONFIG_SPL_SPI_FLASH_SUPPORT
288 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
289 #define CONFIG_SPL_SPI_LOAD
293 #define CONFIG_VIDEO_IPUV3
294 #define CONFIG_IPUV3_CLK 260000000
295 #define CONFIG_IMX_HDMI
296 #define CONFIG_IMX_VIDEO_SKIP
297 #define CONFIG_CFB_CONSOLE
298 #define CONFIG_VGA_AS_SINGLE_DEVICE
299 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
300 #define CONFIG_CONSOLE_MUX
301 #define CONFIG_VIDEO_SW_CURSOR
303 #define CONFIG_SPLASH_SCREEN
304 #define CONFIG_SPLASH_SOURCE
305 #define CONFIG_CMD_BMP
306 #define CONFIG_VIDEO_BMP_RLE8
308 #define CONFIG_VIDEO_LOGO
309 #define CONFIG_VIDEO_BMP_LOGO
311 #endif /* __CONFIG_CM_FX6_H */